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PLC2 Training Format

Webinars around FPGAs, Embedded Systems, and Programming Languages

The free 1-hour PLC2 webinars give participants a brief insight into a specific problem or topic. Our webinars shine with technical depth despite the limited time available. They are a good introduction to a topic.

Webinar in a Nutshell

One-hour free event

PLC2 provides brief insides into different hot topics, design challenges, or technologies.
01

Online event

Learn and get briefed from behind your desk. Ask questions in the chat room. No need to travel and lose valuable time.
02

Focus on technical topics

We select our topics based on engineering product design challenges. This is not a marketing or sales event.
03

Good starting point

Get introduced to a specific topic for one hour and then follow up with a deep dive training class or workshop of PLC2.
04

Upcoming Webinars

Course Format Category Location Duration Date

All about Memories in Adaptive SoCs

WE (Webinar)

Embedded for AMD (Adaptive) SoCs & MPSoCs

Online

1 hour

on demand

Info

adaptive SoC memory programming FPGA AMD webinar, Memories, Memory, UltraRAM, BlockRAM, Memory Access, Adaptive SoC

VHDL Circuit Simulation Part 2: Stimulus Generation and Behavior Verification

WE (Webinar)

Programming Languages

Online

11-12 am CEST

Jul 23, 2024

Info

VHDL circuit simulation simulations FPGA AMD webinar

VHDL Circuit Simulation Part 1: Behavior Modeling, Timing, and File I/O

WE (Webinar)

Programming Languages

Online

11-12 am CEST

Jun 27, 2024

Info

VHDL circuit simulation simulations FPGA AMD webinar

VHDL Circuit Design Part 2: Advanced Concepts and Behavioral Modeling

WE (Webinar)

Programming Languages

Online

1 hour

on demand

Info

VHDL circuit design designs application applications behavioral modeling AMD webinar

VHDL Circuit Design Part 1: Fundamentals and Methodologies

WE (Webinar)

Programming Languages

Online

1 hour

on demand

Info

VHDL circuit design designs application applications AMD webinar HDL hardware design

FPGA Timing Constraints: A Comprehensive Overview

WE (Webinar)

Development
Tools & Methodology

Online

1 hour

on demand

Info

FPGA timing constraints AMD Vivado AMD FPGA design flow virtual clocks webinar

Mastering Clock Domain Crossing: Strategies for Synchronization and Stability

WE (Webinar)

AMD (Adaptive) SoC, MPSoC & FPGA Architecture

Online

1 hour

on demand

Info

clock domain crossing AMDF FPGA FPGAs metastability synchronizers MTBF signal synchronization AMD webinar

FPGA Circuit Design Part 2: Interfaces and Best Practices

WE (Webinar)

AMD (Adaptive) SoC, MPSoC & FPGA Architecture

Online

1 hour

on demand

Info

FPGA Circuit Design designs synchronous asynchronous design techniques technique designing state machines machine AMD webinar

FPGA Circuit Design Part 1: Synchronous and Asynchronous Design Techniques

WE (Webinar)

AMD (Adaptive) SoC, MPSoC & FPGA Architecture

Online

1 hour

on demand

Info

FPGA Circuit Design designs synchronous asynchronous design techniques technique, designing state machines machine AMD

Microservice Applications on Versal and Other Adaptive SoCs

WE (Webinar)

Embedded for AMD (Adaptive) SoCs & MPSoCs

Online

1 hour

on demand

Info

Fast Track Evaluation of ML Models on Versal Adaptive SoC

WE (Webinar)

DSP & Image Processing

Online

1 hour

on demand

Info

Multimedia Accelerators for Kria SoM with HLS & Vitis Libraries

WE (Webinar)

Development
Tools & Methodology

Online

1 hour

on demand

Info

Acceleration Kernels with Versal AI Engine

WE (Webinar)

Embedded for AMD (Adaptive) SoCs & MPSoCs

Online

1 hour

on demand

Info

Versal, AI Engine, ACAP, Acceleration Kernel, Kernels, Kernel, Acceleration

Understanding Versal: The Adaptable Engines

WE (Webinar)

AMD (Adaptive) SoC, MPSoC & FPGA Architecture

Online

1 hour

on demand

Info

Versal, AI, Zynq, MPSoC

Understanding Versal: The DSP Engines

WE (Webinar)

AMD (Adaptive) SoC, MPSoC & FPGA Architecture

Online

1 hour

on demand

Info

Versal, AI, Zynq, MPSoC

Understanding Versal: The AI Engine

WE (Webinar)

AMD (Adaptive) SoC, MPSoC & FPGA Architecture

Online

1 hour

on demand

Info

Versal, AI, Zynq, MPSoC

Understanding Versal: Scalar Engines - The Processing System

WE (Webinar)

AMD (Adaptive) SoC, MPSoC & FPGA Architecture

Online

1 hour

on demand

Info

Versal, AI, Zynq, MPSoC

Understanding Versal: The Architecture

WE (Webinar)

AMD (Adaptive) SoC, MPSoC & FPGA Architecture

Online

1 hour

on demand

Info

Versal, AI, Zynq, MPSoC

Understanding Versal: Versal vs. Zynq MPSoC

WE (Webinar)

AMD (Adaptive) SoC, MPSoC & FPGA Architecture

Online

1 hour

on demand

Info

Versal, AI, Zynq, MPSoC

Versal Adaptive SoC: The Processing System Interfaces

WE (Webinar)

Embedded for AMD (Adaptive) SoCs & MPSoCs

Online

1 hour

on demand

Info

Versal, AI, Ultrascale+, MPSoC

Vitis Tools for Acceleration - Creating a RTL Kernel: From HDL to Reusable Packaged Kernel

WE (Webinar)

Development
Tools & Methodology

Online

1 hour

on demand

Info

Vitis, RTL kernel, acceleration, design flow

Embedded Device Driver Management in Vitis

WE (Webinar)

Embedded for AMD (Adaptive) SoCs & MPSoCs

Online

1 hour

on demand

Info

Versal, AI, webinar, framework, debugger

Partially Constrained Record Types in VHDL-2008 Or: How to Wire Components Effectively?

WE (Webinar)

Programming Languages

Online

1 hour

on demand

Info

VHDL, VHDL-2008, partially constrained types

Vitis - Huge Debugging Varieties

WE (Webinar)

Development
Tools & Methodology

Online

1 hour

on demand

Info

Versal, AI, webinar, framework, debugger

Vitis AI - Creating an Edge Inference Solution - FPGA-Based Deep Learning (DNN) Accelerator

WE (Webinar)

Development
Tools & Methodology

Online

1 hour

on demand

Info

Vitis AI - Whole  Application Acceleration Using Versal VCK190

WE (Webinar)

Development
Tools & Methodology

Online

1 hour

on demand

Info

Introduction to ROS Video Application Acceleration Using Kria SOM and Vitis Tools

WE (Webinar)

Embedded for AMD (Adaptive) SoCs & MPSoCs

Online

1 hour

on demand

Info

ROS, Kria SOM, Vitis, MPSoC

Introduction to AI Applications Using Kria SoM

WE (Webinar)

Embedded for AMD (Adaptive) SoCs & MPSoCs

Online

1 hour

on demand

Info

Vitis Model Composer for Kria SoM: Block Diagram Based Accelerator Design

WE (Webinar)

Embedded for AMD (Adaptive) SoCs & MPSoCs

Online

1 hour

on demand

Info

Vivado IPI - Increase the Productivity in Hardware Design

WE (Webinar)

Embedded for AMD (Adaptive) SoCs & MPSoCs

Online

1 hour

on demand

Info


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How can we help?

Contact

FAQ

01. Can you help me with reserving the room?

If you need a room for a face-to-face course, please contact us. We will support you in choosing suitable accommodation.

02. What times in the day do courses start and end?

Our face-to-face courses start daily at 9 a.m. (CET/CEST) and end at 5 p.m., with two coffee breaks and an extended lunch break. The total course time per day is 6 hours. For online courses, the start is also at 9 a.m. (CET/CEST), but they end at 2:30 p.m.. The total course time per day is 4 and a half hours plus breaks.

03. Are course materials provided?

All participants of paid courses will receive English training materials in electronic or paper form.

04. Will I receive a course certificate?

Each participant of a paid PLC2 course will receive a signed certificate of attendance at the end of the course.

05. Can I pay with Training Credits (TCs)?

Of course, you can also pay for your training using your available TCs (Training Credits). We will then invoice AMD directly. If you do not have sufficient credit for the booked training, the difference can be paid for with an additional payment. The additional charge will be invoiced directly to you.

06. What are the options for payment?

You can pay us via bank transfer or with TCs (Training Credits). Unfortunately, payment via debit, credit card, or PayPal is not possible.

07. What is the deadline for payment?

Payment is due 14 days after the invoice date, without deduction. Please transfer the amount within that time.

08. What are the options for cancelling?

You can cancel free of charge up to 14 days before the course starts. If you have to cancel at short notice due to illness or other reasons, you have the option of adding a substitute participant or of making up the course at a later date (within 6 months).

09. When will I receive a firm commitment as to whether the course will take place?

You will receive binding confirmation 7 days before the course begins as to whether it will go ahead.

10. How many participants are required for a course to be given/what is the minimum number of participants?

We generally offer courses for 5 or more people. That means that if you would like to book a course at your premises, you need 5 people to register or need to pay the amount for 5 participants, even if fewer people attend.

11. Can I book a course that is given in English?

If you need a course that is officially advertised as given in German to be given in English, please contact us. We will try to make that possible for you.

12. What language is the course in?

Our webinars and online courses are conducted in English. All our F2F training courses are generally conducted in German. Feel free to contact us if you need face-to-face training in English or online training in German.