Teaser – The FPGA Basics
Listen to the teaser now and get ready for our expert Eugen Krassin, as he chats with industry leaders and FPGA professionals about the most common mistakes young engineers make and discuss their approach to basic issues in the design flow of FPGAs.
1.4 Clock Domain Crossing Made Simple
In this episode, our experts explore synchronous and asynchronous systems, focusing on topics such as interfacing domains with different clock frequencies and the insertion of Clock Domain Crossing circuits to handle Flip-Flop metastability in FPGA design.
1.3 Timing Made Simple
Our experts address the necessity of timing constraints in FPGA design to ensure, that a circuit meets its specific performance goals using parameters, such as a clock period. Furthermore, the needed framework for timing constraint specification is explained.
1.2 Simulation Made Simple
This episode follows up with an introduction to the modeling and simulation in FPGAs, with a focus on the three main simulation model abstractions for digital logic design.
1.1 The FPGA Basics
FPGA designs in hardware development can be very challenging. In this episode, our experts highlight the importance of two common sources of issues: timing constraints and a functional FPGA simulation.
How Can we help?
Contact
FAQ
01. How can I listen to PLC2’s podcasts?
You can listen to our podcasts directly on our website by visiting the Podcasts section, or you can subscribe and listen on popular podcast platforms such as Apple Podcasts, Spotify, Google Podcasts, and more.
02. How often are new episodes released?
New episodes are typically released every two weeks. We strive to maintain a regular schedule to keep our listeners engaged and informed.
03. Are PLC2’s podcasts free to listen to?
Yes, all of our podcasts are free to listen to. There are no charges or paid subscriptions required to access our podcast episodes.