Embedded Development Service

Full project support or partial project delivery – flexible and efficient.

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Embedded PCB Design

Expert PCB design for embedded projects – reliable and customized.

Advanced FPGA Design

Customized FPGA design – precise and performance-driven.

Embedded AI Integration

Seamless AI integration – innovative and future-ready.

PLC2 Celebrates 30 Years

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About PLC2

We are shaping the future of
smart logic and FPGA

At PLC2, we are convinced that we have to think differently about progress today in order to be able to actively and sustainably meet the challenges of the future. As a catalyst for innovation, we actively shape the world of tomorrow by meeting the growing demand for know how in the field of smart logic and FPGA and by developing pioneering and holistic technology and product solutions.

We are experts in the field of embedded systems. Our passion is state-of-the-art programmable technologies, such as FPGAs, with the promise of providing solutions for complex tasks. We apply this expertise in three areas.

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Trainings

We offer a wide range of professional training courses on FPGAs, MPSoCs, AI / Deep Learning, Computer Vision, and embedded systems, which we have been successfully offering on the market for 30 years.

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Embedded Development Service

We support our customers with embedded design services in various market segments. Our team is experienced in taking over complex projects.

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Products

In our own development department, we develop products focused on high-performance edge acceleration for various markets such as robotics, defense, medical, or automotive.

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All trainings

Course	Format	Category	Location	Duration	Date
Embedded System Basics for AMD	WE (Webinar)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	11-12 am CET	Feb 25, 2025	Info Adaptive SoC, Zynq, Embedded, software programming, hardware programming,
System Debugging Using Cross-Triggering Features	WE (Webinar)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	1 hour	on demand	Info vitis vivado debugging cross-triggering
Using the Adaptive SoC TRDs to Test Custom Image Recognition Tasks	WE (Webinar)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	1 hour	on demand	Info AMD Adaptive SoC TRDs Custom Image Recognition vision
Deep Neural Networks on Edge Devices with Vitis AI	WE (Webinar)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	1 hour	on demand	Info adaptive SoC FPGA AMD vision CNN neural networks Vitis AI toolchain DPU
All about Memories in Adaptive SoCs	WE (Webinar)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	1 hour	on demand	Info adaptive SoC memory programming FPGA AMD webinar, Memories, Memory, UltraRAM, BlockRAM, Memory Access, Adaptive SoC
VHDL Circuit Simulation Part 2: Stimulus Generation and Behavior Verification	WE (Webinar)	Programming Languages	Online	1 hour	on demand	Info VHDL circuit simulation simulations FPGA AMD webinar
VHDL Circuit Simulation Part 1: Behavior Modeling, Timing, and File I/O	WE (Webinar)	Programming Languages	Online	1 hour	on demand	Info VHDL circuit simulation simulations FPGA AMD webinar
VHDL Circuit Design Part 2: Advanced Concepts and Behavioral Modeling	WE (Webinar)	Programming Languages	Online	1 hour	on demand	Info VHDL circuit design designs application applications behavioral modeling AMD webinar
VHDL Circuit Design Part 1: Fundamentals and Methodologies	WE (Webinar)	Programming Languages	Online	1 hour	on demand	Info VHDL circuit design designs application applications AMD webinar HDL hardware design
FPGA Timing Constraints: A Comprehensive Overview	WE (Webinar)	Development Tools & Methodology	Online	1 hour	on demand	Info FPGA timing constraints AMD Vivado AMD FPGA design flow virtual clocks webinar
Mastering Clock Domain Crossing: Strategies for Synchronization and Stability	WE (Webinar)	AMD (Adaptive) SoC, MPSoC & FPGA Architecture	Online	1 hour	on demand	Info clock domain crossing AMDF FPGA FPGAs metastability synchronizers MTBF signal synchronization AMD webinar
FPGA Circuit Design Part 2: Interfaces and Best Practices	WE (Webinar)	AMD (Adaptive) SoC, MPSoC & FPGA Architecture	Online	1 hour	on demand	Info FPGA Circuit Design designs synchronous asynchronous design techniques technique designing state machines machine AMD webinar
FPGA Circuit Design Part 1: Synchronous and Asynchronous Design Techniques	WE (Webinar)	AMD (Adaptive) SoC, MPSoC & FPGA Architecture	Online	1 hour	on demand	Info FPGA Circuit Design designs synchronous asynchronous design techniques technique, designing state machines machine AMD
Developing Demanding Applications with Versal Adaptive SoCs	OL (Online Live)	AMD (Adaptive) SoC, MPSoC & FPGA Architecture	Online	1 day	the whole year tbd	Info Seminar Versal Adaptive SoC Vitis Unififed Development Platform design integration
Microservice Applications on Versal and Other Adaptive SoCs	WE (Webinar)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	1 hour	on demand	Info
Fast Track Evaluation of ML Models on Versal Adaptive SoC	WE (Webinar)	DSP & Image Processing	Online	1 hour	on demand	Info
Vitis Model Composer for Kria SoM: Block Diagram Based Accelerator Design	WE (Webinar)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	1 hour	on demand	Info
NEW \| Scripting the AMD Hardware Design Flow Using Vivado	WO (Workshop)	Development Tools & Methodology	Munich	3 days	May 12, 2025	Info
NEW \| Scripting the AMD Hardware Design Flow Using Vivado	WO (Workshop)	Development Tools & Methodology	Frankfurt / Main	3 days	Sep 22, 2025	Info
NEW \| Scripting the AMD Hardware Design Flow Using Vivado	WO (Workshop)	Development Tools & Methodology	Berlin	3 days	Nov 12, 2025	Info
NEW \| Scripting the AMD Hardware Design Flow Using Vivado	OL (Online Live)	Development Tools & Methodology	Online	3 days	May 12, 2025	Info
NEW \| Scripting the AMD Hardware Design Flow Using Vivado	OL (Online Live)	Development Tools & Methodology	Online	3 days	Sep 22, 2025	Info
NEW \| Scripting the AMD Hardware Design Flow Using Vivado	OL (Online Live)	Development Tools & Methodology	Online	3 days	Nov 12, 2025	Info
Circuit Synthesis with VHDL	SE (Seminar)	Programming Languages	Frankfurt / Main	1 day	Apr 03, 2025	Info FPGA HDL VHDL HDL Language Description Hardware FPGA Programmable Logic Synthese Implementierung bit Bitstream
Circuit Synthesis with VHDL	SE (Seminar)	Programming Languages	Stuttgart	1 day	Oct 01, 2025	Info FPGA HDL VHDL HDL Language Description Hardware FPGA Programmable Logic Synthese Implementierung bit Bitstream
Circuit Simulation with VHDL	SE (Seminar)	Programming Languages	Freiburg	1 day	May 27, 2025	Info FPGA HDL VHDL HDL Language Verification Hardware FPGA Programmable Logic Simulation
Circuit Simulation with VHDL	SE (Seminar)	Programming Languages	Frankfurt / Main	1 day	Nov 12, 2025	Info FPGA HDL VHDL HDL Language Verification Hardware FPGA Programmable Logic Simulation
Compact SystemVerilog for Synthesis	WO (Workshop)	Programming Languages	Stuttgart	3 days	Feb 03, 2025	Info FPGA HDL Verilog SystemVerilog Language Description Hardware FPGA Programmable Logic Synthese Simulation Implementierung bit Bitstream Design Verification Synthesis
Compact SystemVerilog for Synthesis	WO (Workshop)	Programming Languages	Frankfurt / Main	3 days	Apr 22, 2025	Info FPGA HDL Verilog SystemVerilog Language Description Hardware FPGA Programmable Logic Synthese Simulation Implementierung bit Bitstream Design Verification Synthesis
Compact SystemVerilog for Synthesis	WO (Workshop)	Programming Languages	Freiburg	3 days	Jul 28, 2025	Info FPGA HDL Verilog SystemVerilog Language Description Hardware FPGA Programmable Logic Synthese Simulation Implementierung bit Bitstream Design Verification Synthesis
Compact SystemVerilog for Synthesis	WO (Workshop)	Programming Languages	Munich	3 days	Oct 29, 2025	Info FPGA HDL Verilog SystemVerilog Language Description Hardware FPGA Programmable Logic Synthese Simulation Implementierung bit Bitstream Design Verification Synthesis
Compact SystemVerilog for Synthesis	OL (Online Live)	Programming Languages	Online	3 days	Feb 03, 2025	Info FPGA HDL Verilog SystemVerilog Language Description Hardware FPGA Programmable Logic Synthese Simulation Implementierung bit Bitstream Design Verification Synthesis
Compact SystemVerilog for Synthesis	OL (Online Live)	Programming Languages	Online	3 days	Apr 22, 2025	Info FPGA HDL Verilog SystemVerilog Language Description Hardware FPGA Programmable Logic Synthese Simulation Implementierung bit Bitstream Design Verification Synthesis
Compact SystemVerilog for Synthesis	OL (Online Live)	Programming Languages	Online	3 days	Jul 28, 2025	Info FPGA HDL Verilog SystemVerilog Language Description Hardware FPGA Programmable Logic Synthese Simulation Implementierung bit Bitstream Design Verification Synthesis
Compact SystemVerilog for Synthesis	OL (Online Live)	Programming Languages	Online	3 days	Oct 29, 2025	Info FPGA HDL Verilog SystemVerilog Language Description Hardware FPGA Programmable Logic Synthese Simulation Implementierung bit Bitstream Design Verification Synthesis
Easy Start ML Application Design Flow	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	2 days	Apr 03, 2025	Info Easy Start ML Application Design Flow Machine Learning Vitis AI AMD adaptive SoCs AMD adaptive SoC Deep Learning Processing Unit DPU PyTorch TensorFlow
Easy Start ML Application Design Flow	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	2 days	Jul 08, 2025	Info Easy Start ML Application Design Flow Machine Learning Vitis AI AMD adaptive SoCs AMD adaptive SoC Deep Learning Processing Unit DPU PyTorch TensorFlow
Easy Start ML Application Design Flow	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	2 days	Oct 15, 2025	Info Easy Start ML Application Design Flow Machine Learning Vitis AI AMD adaptive SoCs AMD adaptive SoC Deep Learning Processing Unit DPU PyTorch TensorFlow
Easy Start ML Application Design Flow	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Munich	2 days	Dec 01, 2025	Info Easy Start ML Application Design Flow Machine Learning Vitis AI AMD adaptive SoCs AMD adaptive SoC Deep Learning Processing Unit DPU PyTorch TensorFlow
Easy Start Embedded Flow	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	2 days	Mar 19, 2025	Info Easy Start Embedded AMD programmable platforms adaptive SoCs adaptive SoC FPGA FPGAs processor core Vivado Vitis c c++ c/c++ AMD FPGAs and adaptive SoCs technology programming languages VHDL AXI hardware design
Easy Start Embedded Flow	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	2 days	Jun 26, 2025	Info Easy Start Embedded AMD programmable platforms adaptive SoCs adaptive SoC FPGA FPGAs processor core Vivado Vitis c c++ c/c++ AMD FPGAs and adaptive SoCs technology programming languages VHDL AXI hardware design
Easy Start Embedded Flow	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Berlin	2 days	Sep 09, 2025	Info Easy Start Embedded AMD programmable platforms adaptive SoCs adaptive SoC FPGA FPGAs processor core Vivado Vitis c c++ c/c++ AMD FPGAs and adaptive SoCs technology programming languages VHDL AXI hardware design
Easy Start Embedded Flow	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	2 days	Nov 27, 2025	Info Easy Start Embedded AMD programmable platforms adaptive SoCs adaptive SoC FPGA FPGAs processor core Vivado Vitis c c++ c/c++ AMD FPGAs and adaptive SoCs technology programming languages VHDL AXI hardware design
Advanced VHDL	WO (Workshop)	Programming Languages	Stuttgart	3 days	Mar 24, 2025	Info Advanced VHDL OSVVM sytnhesis simulation UVVM VUnit VHDL-2019 EDA tool
Advanced VHDL	WO (Workshop)	Programming Languages	Frankfurt / Main	3 days	Jul 21, 2025	Info Advanced VHDL OSVVM sytnhesis simulation UVVM VUnit VHDL-2019 EDA tool
Advanced VHDL	WO (Workshop)	Programming Languages	Freiburg	3 days	Oct 29, 2025	Info Advanced VHDL OSVVM sytnhesis simulation UVVM VUnit VHDL-2019 EDA tool
Advanced VHDL	WO (Workshop)	Programming Languages	Munich	3 days	Dec 15, 2025	Info Advanced VHDL OSVVM sytnhesis simulation UVVM VUnit VHDL-2019 EDA tool
Advanced VHDL	OL (Online Live)	Programming Languages	Online	3 days	Mar 24, 2025	Info Advanced VHDL OSVVM sytnhesis simulation UVVM VUnit VHDL-2019 EDA tool
Advanced VHDL	OL (Online Live)	Programming Languages	Online	3 days	Jul 21, 2025	Info Advanced VHDL OSVVM sytnhesis simulation UVVM VUnit VHDL-2019 EDA tool
Advanced VHDL	OL (Online Live)	Programming Languages	Online	3 days	Oct 29, 2025	Info Advanced VHDL OSVVM sytnhesis simulation UVVM VUnit VHDL-2019 EDA tool
Advanced VHDL	OL (Online Live)	Programming Languages	Online	3 days	Dec 15, 2025	Info Advanced VHDL OSVVM sytnhesis simulation UVVM VUnit VHDL-2019 EDA tool
Compact MicroBlaze System Design	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	all year on request	Info Embedded MicroBlaze System Design Systems FPGA hardware software AMD tool tools custom peripheral application debugging integration microprocessor microprocessors Vivado Vitis
Compact MicroBlaze System Design	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs		3 days	all year on request	Info Embedded MicroBlaze System Design Systems FPGA hardware software AMD tool tools custom peripheral application debugging integration microprocessor microprocessors Vivado Vitis
Compact VHDL Testbenches and Verification with OSVVM	WO (Workshop)	Programming Languages	Stuttgart	3 days	Mar 04, 2025	Info FPGA HDL VHDL HDL Language Verification Hardware FPGA Programmable Logic Simulation Open-Source Open Source Method AXI VIP IP Simulator
Compact VHDL Testbenches and Verification with OSVVM	WO (Workshop)	Programming Languages	Freiburg	3 days	May 26, 2025	Info FPGA HDL VHDL HDL Language Verification Hardware FPGA Programmable Logic Simulation Open-Source Open Source Method AXI VIP IP Simulator
Compact VHDL Testbenches and Verification with OSVVM	WO (Workshop)	Programming Languages	Berlin	3 days	Aug 05, 2025	Info FPGA HDL VHDL HDL Language Verification Hardware FPGA Programmable Logic Simulation Open-Source Open Source Method AXI VIP IP Simulator
Compact VHDL Testbenches and Verification with OSVVM	WO (Workshop)	Programming Languages	Munich	3 days	Oct 06, 2025	Info FPGA HDL VHDL HDL Language Verification Hardware FPGA Programmable Logic Simulation Open-Source Open Source Method AXI VIP IP Simulator
Compact VHDL Testbenches and Verification with OSVVM	OL (Online Live)	Programming Languages	Online	3 days	Mar 04, 2025	Info FPGA HDL VHDL HDL Language Verification Hardware FPGA Programmable Logic Simulation Open-Source Open Source Method AXI VIP IP Simulator
Compact VHDL Testbenches and Verification with OSVVM	OL (Online Live)	Programming Languages	Online	3 days	May 26, 2025	Info FPGA HDL VHDL HDL Language Verification Hardware FPGA Programmable Logic Simulation Open-Source Open Source Method AXI VIP IP Simulator
Compact VHDL Testbenches and Verification with OSVVM	OL (Online Live)	Programming Languages	Online	3 days	Aug 05, 2025	Info FPGA HDL VHDL HDL Language Verification Hardware FPGA Programmable Logic Simulation Open-Source Open Source Method AXI VIP IP Simulator
Compact VHDL Testbenches and Verification with OSVVM	OL (Online Live)	Programming Languages	Online	3 days	Oct 06, 2025	Info FPGA HDL VHDL HDL Language Verification Hardware FPGA Programmable Logic Simulation Open-Source Open Source Method AXI VIP IP Simulator
Advanced Vivado	WO (Workshop)	Development Tools & Methodology	Freiburg	3 days	Apr 28, 2025	Info Tools and Methodology AMD Advanced Vivado design suite tool hardware debugging debug tool tools TCL scripting FPGAs adaptive SoCs SoC VHDL Verilog
Advanced Vivado	WO (Workshop)	Development Tools & Methodology	Stuttgart	3 days	Jul 21, 2025	Info Tools and Methodology AMD Advanced Vivado design suite tool hardware debugging debug tool tools TCL scripting FPGAs adaptive SoCs SoC VHDL Verilog
Advanced Vivado	WO (Workshop)	Development Tools & Methodology	Frankfurt / Main	3 days	Oct 29, 2025	Info Tools and Methodology AMD Advanced Vivado design suite tool hardware debugging debug tool tools TCL scripting FPGAs adaptive SoCs SoC VHDL Verilog
Advanced Vivado	OL (Online Live)	Development Tools & Methodology	Online	3 days	Apr 28, 2025	Info Tools and Methodology AMD Advanced Vivado design suite tool hardware debugging debug tool tools TCL scripting FPGAs adaptive SoCs SoC VHDL Verilog
Advanced Vivado	OL (Online Live)	Development Tools & Methodology	Online	3 days	Jul 21, 2025	Info Tools and Methodology AMD Advanced Vivado design suite tool hardware debugging debug tool tools TCL scripting FPGAs adaptive SoCs SoC VHDL Verilog
Advanced Vivado	OL (Online Live)	Development Tools & Methodology	Online	3 days	Oct 29, 2025	Info Tools and Methodology AMD Advanced Vivado design suite tool hardware debugging debug tool tools TCL scripting FPGAs adaptive SoCs SoC VHDL Verilog
Compact Versal Adaptive SoC: PCI Express Systems	WO (Workshop)	Connectivity	Munich	2 days	Mar 10, 2025	Info Versal PCI Express Integrated Block for PCI Express Gen4 PL PCIe CPM PCIe High-Speed Interfaces Transceiver DDR4 PCB Design PCB Simulation ACAP PCIe endpoint root port DMA VCK190
Compact Versal Adaptive SoC: PCI Express Systems	WO (Workshop)	Connectivity	Berlin	2 days	Jun 02, 2025	Info Versal PCI Express Integrated Block for PCI Express Gen4 PL PCIe CPM PCIe High-Speed Interfaces Transceiver DDR4 PCB Design PCB Simulation ACAP PCIe endpoint root port DMA VCK190
Compact Versal Adaptive SoC: PCI Express Systems	WO (Workshop)	Connectivity	Stuttgart	2 days	Oct 15, 2025	Info Versal PCI Express Integrated Block for PCI Express Gen4 PL PCIe CPM PCIe High-Speed Interfaces Transceiver DDR4 PCB Design PCB Simulation ACAP PCIe endpoint root port DMA VCK190
Compact Versal Adaptive SoC: PCI Express Systems	OL (Online Live)	Connectivity	Online	2 days	Mar 10, 2025	Info Versal PCI Express Integrated Block for PCI Express Gen4 PL PCIe CPM PCIe High-Speed Interfaces Transceiver DDR4 PCB Design PCB Simulation ACAP PCIe endpoint root port DMA VCK190
Compact Versal Adaptive SoC: PCI Express Systems	OL (Online Live)	Connectivity	Online	2 days	Jun 02, 2025	Info Versal PCI Express Integrated Block for PCI Express Gen4 PL PCIe CPM PCIe High-Speed Interfaces Transceiver DDR4 PCB Design PCB Simulation ACAP PCIe endpoint root port DMA VCK190
Compact Versal Adaptive SoC: PCI Express Systems	OL (Online Live)	Connectivity	Online	2 days	Oct 15, 2025	Info Versal PCI Express Integrated Block for PCI Express Gen4 PL PCIe CPM PCIe High-Speed Interfaces Transceiver DDR4 PCB Design PCB Simulation ACAP PCIe endpoint root port DMA VCK190
Kria for the Software Developer	SE (Seminar)	Embedded for AMD (Adaptive) SoCs & MPSoCs		1 day	all year on request	Info SoM Acceleration Vitis tool flow Zynq MPSoC Software C
Professional Versal Adaptive SoC	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Munich	5 days	Mar 10, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC Acceleration & AI
Professional Versal Adaptive SoC	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	5 days	Jun 23, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC Acceleration & AI
Professional Versal Adaptive SoC	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	5 days	Sep 15, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC Acceleration & AI
Professional Versal Adaptive SoC	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	5 days	Nov 10, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC Acceleration & AI
Professional Versal Adaptive SoC	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	Mar 10, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC Acceleration & AI
Professional Versal Adaptive SoC	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	Jun 23, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC Acceleration & AI
Professional Versal Adaptive SoC	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	Sep 15, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC Acceleration & AI
Professional Versal Adaptive SoC	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	Nov 10, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC Acceleration & AI
Compact Zynq 7000 SoC for the Software Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs		3 days	all year on request	Info Embedded Architecture Vivado Vitis SoC Cortex-A9 Processor Cache PetaLinux Linux PS AXI
Compact Zynq 7000 SoC for the Software Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	all year on request	Info Embedded Architecture Vivado Vitis SoC Cortex-A9 Processor Cache PetaLinux Linux PS AXI
Professional Zynq 7000 SoC	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs		5 days	all year on request	Info Embedded Architecture Vivado Vitis Zynq SoC Boot Software C C++ AXI Configuration System Integration Debugging AXI
Professional Zynq 7000 SoC	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	all year on request	Info Embedded Architecture Vivado Vitis Zynq SoC Boot Software C C++ AXI Configuration System Integration Debugging AXI
Professional Zynq UltraScale+ MPSoC	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	5 days	Mar 24, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Professional Zynq UltraScale+ MPSoC	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	5 days	Jun 23, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Professional Zynq UltraScale+ MPSoC	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	5 days	Sep 15, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Professional Zynq UltraScale+ MPSoC	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	5 days	Dec 08, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Professional Zynq UltraScale+ MPSoC	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	Mar 24, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Professional Zynq UltraScale+ MPSoC	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	Jun 23, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Professional Zynq UltraScale+ MPSoC	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	Sep 15, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Professional Zynq UltraScale+ MPSoC	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	Dec 08, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Expert Zynq 7000 SoC	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs		5 days	all year on request	Info Embedded Architecture Vivado Vitis SoC Cortex-A9 Processor Cache PetaLinux IP-Integrator Linux PS AXI
Expert Zynq 7000 SoC	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	all year on request	Info Embedded Architecture Vivado Vitis SoC Cortex-A9 Processor Cache PetaLinux IP-Integrator Linux PS AXI
Expert Versal Adaptive SoC AI Engine	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	5 days	Apr 07, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP , Acceleration & AI
Expert Versal Adaptive SoC AI Engine	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Munich	5 days	Jul 14, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP , Acceleration & AI
Expert Versal Adaptive SoC AI Engine	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	5 days	Oct 06, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP , Acceleration & AI
Expert Versal Adaptive SoC AI Engine	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	Apr 07, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP , Acceleration & AI
Expert Versal Adaptive SoC AI Engine	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	Jul 14, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP , Acceleration & AI
Expert Versal Adaptive SoC AI Engine	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	Oct 06, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP , Acceleration & AI
Embedded Linux Driver Development	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs		3 days	all year on request	Info Embedded PetaLinux Vitis Linux OS Operating System Open Source OSS Driver Application Library Software Kernel Debugging Performance Boot Bootflow elf c c++ c/c++ Device Tree Devicetree Device-Tree Driver Character Yocto tool flow Zynq
Embedded Linux Driver Development	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	all year on request	Info Embedded PetaLinux Vitis Linux OS Operating System Open Source OSS Driver Application Library Software Kernel Debugging Performance Boot Bootflow elf c c++ c/c++ Device Tree Devicetree Device-Tree Driver Character Yocto tool flow Zynq
Embedded Design with PetaLinux Tools	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	2 days	Mar 04, 2025	Info Embedded Linux PetaLinux build rootfs kernel driver layer DeviceTree Device-Tree Boot
Embedded Design with PetaLinux Tools	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	2 days	Jun 24, 2025	Info Embedded Linux PetaLinux build rootfs kernel driver layer DeviceTree Device-Tree Boot
Embedded Design with PetaLinux Tools	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Berlin	2 days	Sep 11, 2025	Info Embedded Linux PetaLinux build rootfs kernel driver layer DeviceTree Device-Tree Boot
Embedded Design with PetaLinux Tools	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Munich	2 days	Nov 25, 2025	Info Embedded Linux PetaLinux build rootfs kernel driver layer DeviceTree Device-Tree Boot
Embedded Design with PetaLinux Tools	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	2 days	Mar 04, 2025	Info Embedded Linux PetaLinux build rootfs kernel driver layer DeviceTree Device-Tree Boot
Embedded Design with PetaLinux Tools	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	2 days	Jun 24, 2025	Info Embedded Linux PetaLinux build rootfs kernel driver layer DeviceTree Device-Tree Boot
Embedded Design with PetaLinux Tools	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	2 days	Sep 11, 2025	Info Embedded Linux PetaLinux build rootfs kernel driver layer DeviceTree Device-Tree Boot
Embedded Design with PetaLinux Tools	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	2 days	Nov 25, 2025	Info Embedded Linux PetaLinux build rootfs kernel driver layer DeviceTree Device-Tree Boot
Easy Start Kria for Vision Development	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	2 days	Feb 06, 2025	Info SOM Vision Vivado Vitis AI Kria Image Processing Vision Kernel Rootfs DeviceTree Device-Tree Embedded mulitmedia camera PetaLinux Linux easy start
Easy Start Kria for Vision Development	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	2 days	May 19, 2025	Info SOM Vision Vivado Vitis AI Kria Image Processing Vision Kernel Rootfs DeviceTree Device-Tree Embedded mulitmedia camera PetaLinux Linux easy start
Easy Start Kria for Vision Development	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	2 days	Sep 25, 2025	Info SOM Vision Vivado Vitis AI Kria Image Processing Vision Kernel Rootfs DeviceTree Device-Tree Embedded mulitmedia camera PetaLinux Linux easy start
Easy Start Kria for Vision Development	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Berlin	2 days	Nov 10, 2025	Info SOM Vision Vivado Vitis AI Kria Image Processing Vision Kernel Rootfs DeviceTree Device-Tree Embedded mulitmedia camera PetaLinux Linux easy start
Easy Start Embedded PetaLinux	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs		2 days	all year on request	Info Embedded PetaLinux Vitis Linux OS Operating System Open Source OSS Driver Application Library Software Kernel Debugging Performance Boot Bootflow elf c c++ c/c++ Device Tree Devicetree Device-Tree Rootfs Zynq easy start
Easy Start Embedded for Zynq-7000 SoC Systems	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs		2 days	all year on request	Info Embedded Introduction Beginner Overview Zynq SoC Embedded Software C C++ Einführung Einstieg bit Bitstream Vivado Vitis AXI Cortex-A9 Processor DSP PS Software Development easy start
Easy Start Embedded for Zynq UltraScale+ MPSoC Systems	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	2 days	Mar 10, 2025	Info Embedded Introduction Beginner Overview Zynq MPSoC Embedded Software C C++ Einführung Einstieg bit Bitstream Vivado Vitis AXI Cortex_A53 Cortex-R5 Processor BSP PMU Power IP-Integrator ACE easy start
Easy Start Embedded for Zynq UltraScale+ MPSoC Systems	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	2 days	Jul 30, 2025	Info Embedded Introduction Beginner Overview Zynq MPSoC Embedded Software C C++ Einführung Einstieg bit Bitstream Vivado Vitis AXI Cortex_A53 Cortex-R5 Processor BSP PMU Power IP-Integrator ACE easy start
Easy Start Embedded for Zynq UltraScale+ MPSoC Systems	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Berlin	2 days	Oct 07, 2025	Info Embedded Introduction Beginner Overview Zynq MPSoC Embedded Software C C++ Einführung Einstieg bit Bitstream Vivado Vitis AXI Cortex_A53 Cortex-R5 Processor BSP PMU Power IP-Integrator ACE easy start
Easy Start Embedded for Zynq UltraScale+ MPSoC Systems	ES (Easy Start)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	2 days	Dec 08, 2025	Info Embedded Introduction Beginner Overview Zynq MPSoC Embedded Software C C++ Einführung Einstieg bit Bitstream Vivado Vitis AXI Cortex_A53 Cortex-R5 Processor BSP PMU Power IP-Integrator ACE easy start
Developing Multimedia Solutions with the VCU and GStreamer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	2 days	Feb 27, 2025	Info SoM Vision Video streaming data application codec Kria Embedded Multimedia Gstreamer VCU Camera PetaLinux Linux Kernel
Developing Multimedia Solutions with the VCU and GStreamer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	2 days	May 08, 2025	Info SoM Vision Video streaming data application codec Kria Embedded Multimedia Gstreamer VCU Camera PetaLinux Linux Kernel
Developing Multimedia Solutions with the VCU and GStreamer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	2 days	Jul 28, 2025	Info SoM Vision Video streaming data application codec Kria Embedded Multimedia Gstreamer VCU Camera PetaLinux Linux Kernel
Developing Multimedia Solutions with the VCU and GStreamer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Berlin	2 days	Oct 09, 2025	Info SoM Vision Video streaming data application codec Kria Embedded Multimedia Gstreamer VCU Camera PetaLinux Linux Kernel
Developing Multimedia Solutions with the VCU and GStreamer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	2 days	Feb 27, 2025	Info SoM Vision Video streaming data application codec Kria Embedded Multimedia Gstreamer VCU Camera PetaLinux Linux Kernel
Developing Multimedia Solutions with the VCU and GStreamer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	2 days	May 08, 2025	Info SoM Vision Video streaming data application codec Kria Embedded Multimedia Gstreamer VCU Camera PetaLinux Linux Kernel
Developing Multimedia Solutions with the VCU and GStreamer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	2 days	Jul 28, 2025	Info SoM Vision Video streaming data application codec Kria Embedded Multimedia Gstreamer VCU Camera PetaLinux Linux Kernel
Developing Multimedia Solutions with the VCU and GStreamer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	2 days	Oct 09, 2025	Info SoM Vision Video streaming data application codec Kria Embedded Multimedia Gstreamer VCU Camera PetaLinux Linux Kernel
Compact Zynq 7000 SoC for the Hardware Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs		3 days	all year on request	Info Embedded Architecture Vivado Vitis Zynq SoC Platform Hardware C AXI
Compact Zynq 7000 SoC for the Hardware Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	all year on request	Info Embedded Architecture Vivado Vitis Zynq SoC Platform Hardware C AXI
NEW \| Advanced Zynq UltraScale+ MPSoC for the Software Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Mar 24, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
NEW \| Advanced Zynq UltraScale+ MPSoC for the Software Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Jun 02, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
NEW \| Advanced Zynq UltraScale+ MPSoC for the Software Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Sep 22, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
NEW \| Advanced Zynq UltraScale+ MPSoC for the Software Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Dec 03, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
NEW \| Advanced Zynq UltraScale+ MPSoC for the Software Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	3 days	Mar 24, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
NEW \| Advanced Zynq UltraScale+ MPSoC for the Software Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	3 days	Jun 02, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
NEW \| Advanced Zynq UltraScale+ MPSoC for the Software Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	3 days	Sep 22, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
NEW \| Advanced Zynq UltraScale+ MPSoC for the Software Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Munich	3 days	Dec 03, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Compact Zynq UltraScale+ MPSoC for the Software Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	3 days	Feb 24, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Compact Zynq UltraScale+ MPSoC for the Software Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	3 days	May 26, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Compact Zynq UltraScale+ MPSoC for the Software Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Berlin	3 days	Aug 05, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Compact Zynq UltraScale+ MPSoC for the Software Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	3 days	Nov 17, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Compact Zynq UltraScale+ MPSoC for the Software Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Feb 24, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Compact Zynq UltraScale+ MPSoC for the Software Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	May 26, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Compact Zynq UltraScale+ MPSoC for the Software Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Aug 05, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Compact Zynq UltraScale+ MPSoC for the Software Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Nov 17, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis
Compact Zynq UltraScale+ MPSoC for the Hardware Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	3 days	Feb 03, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE
Compact Zynq UltraScale+ MPSoC for the Hardware Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	3 days	May 05, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE
Compact Zynq UltraScale+ MPSoC for the Hardware Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Berlin	3 days	Aug 19, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE
Compact Zynq UltraScale+ MPSoC for the Hardware Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Munich	3 days	Nov 03, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE
Compact Zynq UltraScale+ MPSoC for the Hardware Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Feb 03, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE
Compact Zynq UltraScale+ MPSoC for the Hardware Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	May 05, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE
Compact Zynq UltraScale+ MPSoC for the Hardware Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Aug 19, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE
Compact Zynq UltraScale+ MPSoC for the Hardware Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Nov 03, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE
Compact Versal Adaptive SoC for the Software Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	3 days	Feb 17, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC PMC
Compact Versal Adaptive SoC for the Software Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	3 days	May 12, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC PMC
Compact Versal Adaptive SoC for the Software Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	3 days	Aug 25, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC PMC
Compact Versal Adaptive SoC for the Software Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Berlin	3 days	Oct 07, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC PMC
Compact Versal Adaptive SoC for the Software Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Feb 17, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC PMC
Compact Versal Adaptive SoC for the Software Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	May 12, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC PMC
Compact Versal Adaptive SoC for the Software Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Aug 25, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC PMC
Compact Versal Adaptive SoC for the Software Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Oct 07, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC PMC
Compact Versal Adaptive SoC for the Hardware Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	3 days	Apr 14, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC
Compact Versal Adaptive SoC for the Hardware Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Munich	3 days	Jul 21, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC
Compact Versal Adaptive SoC for the Hardware Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	3 days	Oct 13, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC
Compact Versal Adaptive SoC for the Hardware Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Apr 14, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC
Compact Versal Adaptive SoC for the Hardware Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Jul 21, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC
Compact Versal Adaptive SoC for the Hardware Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Oct 13, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC
Compact Embedded Linux	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs		3 days	all year on request	Info Embedded PetaLinux Vitis Linux OS Operating System Open Source OSS Driver Application Library Software Kernel Debugging Performance Boot Bootflow elf c c++ c/c++ Device Tree Devicetree Device-Tree Yocto tool flow Zynq SoC
Compact Embedded Linux	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	all year on request	Info Embedded PetaLinux Vitis Linux OS Operating System Open Source OSS Driver Application Library Software Kernel Debugging Performance Boot Bootflow elf c c++ c/c++ Device Tree Devicetree Device-Tree Yocto tool flow Zynq SoC
Advanced Zynq UltraScale+ MPSoC for the Hardware Designer	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs		3 days	all year on request	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE
Advanced Zynq UltraScale+ MPSoC for the Hardware Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Feb 05, 2025	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE
Advanced Zynq UltraScale+ MPSoC for the Hardware Designer	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	all year on request	Info Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE
Advanced Versal Adaptive SoC AI Engine	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	3 days	Mar 17, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP Acceleration & AI
Advanced Versal Adaptive SoC AI Engine	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Frankfurt / Main	3 days	Jun 11, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP Acceleration & AI
Advanced Versal Adaptive SoC AI Engine	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	3 days	Sep 22, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP Acceleration & AI
Advanced Versal Adaptive SoC AI Engine	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Munich	3 days	Dec 15, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP Acceleration & AI
Advanced Versal Adaptive SoC AI Engine	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Mar 17, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP Acceleration & AI
Advanced Versal Adaptive SoC AI Engine	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Jun 11, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP Acceleration & AI
Advanced Versal Adaptive SoC AI Engine	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Sep 22, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP Acceleration & AI
Advanced Versal Adaptive SoC AI Engine	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Dec 15, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP Acceleration & AI
UVM Testbench Made Easy	WO (Workshop)	Programming Languages		2 days	all year on request	Info FPGA HDL Verilog SystemVerilog Language Verification Hardware FPGA Programmable Logic Simulation UVM Universal Verification Methodology UVM Framework Transactions
UVM Testbench Made Easy	OL (Online Live)	Programming Languages	Online	2 days	all year on request	Info FPGA HDL Verilog SystemVerilog Language Verification Hardware FPGA Programmable Logic Simulation UVM Universal Verification Methodology UVM Framework Transactions
SystemVerilog Advanced Verification for FPGA Design	WO (Workshop)	Programming Languages		3 days	all year on request	Info FPGA HDL SystemVerilog Assertions Language Verification Hardware FPGA Programmable Logic Simulation Coverage Synthese Synthesis
SystemVerilog Advanced Verification for FPGA Design	OL (Online Live)	Programming Languages	Online	3 days	all year on request	Info FPGA HDL SystemVerilog Assertions Language Verification Hardware FPGA Programmable Logic Simulation Coverage Synthese Synthesis
Professional VHDL	PW (Power Workshop)	Programming Languages	Freiburg	5 days	Feb 24, 2025	Info FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis
Professional VHDL	PW (Power Workshop)	Programming Languages	Munich	5 days	May 05, 2025	Info FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis
Professional VHDL	PW (Power Workshop)	Programming Languages	Freiburg	5 days	Jul 21, 2025	Info FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis
Professional VHDL	PW (Power Workshop)	Programming Languages	Frankfurt / Main	5 days	Oct 06, 2025	Info FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis
Professional VHDL	PW (Power Workshop)	Programming Languages	Freiburg	5 days	Dec 15, 2025	Info FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis
Professional VHDL	OL (Online Live)	Programming Languages	Online	5 days	Feb 24, 2025	Info FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis
Professional VHDL	OL (Online Live)	Programming Languages	Online	5 days	May 05, 2025	Info FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis
Professional VHDL	OL (Online Live)	Programming Languages	Online	5 days	Jul 21, 2025	Info FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis
Professional VHDL	OL (Online Live)	Programming Languages	Online	5 days	Oct 06, 2025	Info FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis
Professional VHDL	OL (Online Live)	Programming Languages	Online	5 days	Dec 15, 2025	Info FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis
Professional VHDL Testbenches and Verification with OSVVM	PW (Power Workshop)	Programming Languages	Frankfurt / Main	5 days	Feb 10, 2025	Info FPGA HDL VHDL OSVVM Language Verification Hardware FPGA Programmable Logic Simulation Self-Checking Randomization Verification Component Verification Model Transaction Based Modus Bus Functional Model BFM AXI
Professional VHDL Testbenches and Verification with OSVVM	PW (Power Workshop)	Programming Languages	Freiburg	5 days	Jun 23, 2025	Info FPGA HDL VHDL OSVVM Language Verification Hardware FPGA Programmable Logic Simulation Self-Checking Randomization Verification Component Verification Model Transaction Based Modus Bus Functional Model BFM AXI
Professional VHDL Testbenches and Verification with OSVVM	PW (Power Workshop)	Programming Languages	Freiburg	5 days	Sep 08, 2025	Info FPGA HDL VHDL OSVVM Language Verification Hardware FPGA Programmable Logic Simulation Self-Checking Randomization Verification Component Verification Model Transaction Based Modus Bus Functional Model BFM AXI
Professional VHDL Testbenches and Verification with OSVVM	PW (Power Workshop)	Programming Languages	Stuttgart	5 days	Nov 17, 2025	Info FPGA HDL VHDL OSVVM Language Verification Hardware FPGA Programmable Logic Simulation Self-Checking Randomization Verification Component Verification Model Transaction Based Modus Bus Functional Model BFM AXI
Professional VHDL Testbenches and Verification with OSVVM	OL (Online Live)	Programming Languages	Online	5 days	Feb 10, 2025	Info FPGA HDL VHDL OSVVM Language Verification Hardware FPGA Programmable Logic Simulation Self-Checking Randomization Verification Component Verification Model Transaction Based Modus Bus Functional Model BFM AXI
Professional VHDL Testbenches and Verification with OSVVM	OL (Online Live)	Programming Languages	Online	5 days	Jun 23, 2025	Info FPGA HDL VHDL OSVVM Language Verification Hardware FPGA Programmable Logic Simulation Self-Checking Randomization Verification Component Verification Model Transaction Based Modus Bus Functional Model BFM AXI
Professional VHDL Testbenches and Verification with OSVVM	OL (Online Live)	Programming Languages	Online	5 days	Sep 08, 2025	Info FPGA HDL VHDL OSVVM Language Verification Hardware FPGA Programmable Logic Simulation Self-Checking Randomization Verification Component Verification Model Transaction Based Modus Bus Functional Model BFM AXI
Professional VHDL Testbenches and Verification with OSVVM	OL (Online Live)	Programming Languages	Online	5 days	Nov 17, 2025	Info FPGA HDL VHDL OSVVM Language Verification Hardware FPGA Programmable Logic Simulation Self-Checking Randomization Verification Component Verification Model Transaction Based Modus Bus Functional Model BFM AXI
Professional Python for Embedded	PW (Power Workshop)	Programming Languages	Stuttgart	5 days	Mar 24, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Professional Python for Embedded	PW (Power Workshop)	Programming Languages	Freiburg	5 days	Jun 02, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Professional Python for Embedded	PW (Power Workshop)	Programming Languages	Frankfurt / Main	5 days	Sep 22, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Professional Python for Embedded	PW (Power Workshop)	Programming Languages	Berlin	5 days	Nov 24, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Professional Python for Embedded	OL (Online Live)	Programming Languages	Online	5 days	Mar 24, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Professional Python for Embedded	OL (Online Live)	Programming Languages	Online	5 days	Jun 02, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Professional Python for Embedded	OL (Online Live)	Programming Languages	Online	5 days	Sep 22, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Professional Python for Embedded	OL (Online Live)	Programming Languages	Online	5 days	Nov 24, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Compact VHDL for Synthesis	WO (Workshop)	Programming Languages	Freiburg	3 days	Mar 17, 2025	Info FPGA HDL VHDL Synthesis Language Description Hardware FPGA Programmable Logic Synthese Implementierung bit Bitstream Introduction Vivado
Compact VHDL for Synthesis	WO (Workshop)	Programming Languages	Frankfurt / Main	3 days	Jun 02, 2025	Info FPGA HDL VHDL Synthesis Language Description Hardware FPGA Programmable Logic Synthese Implementierung bit Bitstream Introduction Vivado
Compact VHDL for Synthesis	WO (Workshop)	Programming Languages	Stuttgart	3 days	Sep 15, 2025	Info FPGA HDL VHDL Synthesis Language Description Hardware FPGA Programmable Logic Synthese Implementierung bit Bitstream Introduction Vivado
Compact VHDL for Synthesis	WO (Workshop)	Programming Languages	Munich	3 days	Nov 03, 2025	Info FPGA HDL VHDL Synthesis Language Description Hardware FPGA Programmable Logic Synthese Implementierung bit Bitstream Introduction Vivado
Compact VHDL for Synthesis	OL (Online Live)	Programming Languages	Online	3 days	Mar 17, 2025	Info FPGA HDL VHDL Synthesis Language Description Hardware FPGA Programmable Logic Synthese Implementierung bit Bitstream Introduction Vivado
Compact VHDL for Synthesis	OL (Online Live)	Programming Languages	Online	3 days	Jun 02, 2025	Info FPGA HDL VHDL Synthesis Language Description Hardware FPGA Programmable Logic Synthese Implementierung bit Bitstream Introduction Vivado
Compact VHDL for Synthesis	OL (Online Live)	Programming Languages	Online	3 days	Sep 15, 2025	Info FPGA HDL VHDL Synthesis Language Description Hardware FPGA Programmable Logic Synthese Implementierung bit Bitstream Introduction Vivado
Compact VHDL for Synthesis	OL (Online Live)	Programming Languages	Online	3 days	Nov 03, 2025	Info FPGA HDL VHDL Synthesis Language Description Hardware FPGA Programmable Logic Synthese Implementierung bit Bitstream Introduction Vivado
Compact VHDL for Simulation	WO (Workshop)	Programming Languages	Freiburg	2 days	Mar 20, 2025	Info FPGA HDL VHDL Vivado Language Verification Hardware FPGA Programmable Logic Simulation
Compact VHDL for Simulation	WO (Workshop)	Programming Languages	Frankfurt / Main	2 days	Jun 05, 2025	Info FPGA HDL VHDL Vivado Language Verification Hardware FPGA Programmable Logic Simulation
Compact VHDL for Simulation	WO (Workshop)	Programming Languages	Stuttgart	2 days	Sep 18, 2025	Info FPGA HDL VHDL Vivado Language Verification Hardware FPGA Programmable Logic Simulation
Compact VHDL for Simulation	WO (Workshop)	Programming Languages	Munich	2 days	Nov 06, 2025	Info FPGA HDL VHDL Vivado Language Verification Hardware FPGA Programmable Logic Simulation
Compact VHDL for Simulation	OL (Online Live)	Programming Languages	Online	2 days	Mar 20, 2025	Info FPGA HDL VHDL Vivado Language Verification Hardware FPGA Programmable Logic Simulation
Compact VHDL for Simulation	OL (Online Live)	Programming Languages	Online	2 days	Jun 05, 2025	Info FPGA HDL VHDL Vivado Language Verification Hardware FPGA Programmable Logic Simulation
Compact VHDL for Simulation	OL (Online Live)	Programming Languages	Online	2 days	Sep 18, 2025	Info FPGA HDL VHDL Vivado Language Verification Hardware FPGA Programmable Logic Simulation
Compact VHDL for Simulation	OL (Online Live)	Programming Languages	Online	2 days	Nov 06, 2025	Info FPGA HDL VHDL Vivado Language Verification Hardware FPGA Programmable Logic Simulation
Compact Python for Embedded	WO (Workshop)	Programming Languages	Stuttgart	3 days	Mar 24, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Compact Python for Embedded	WO (Workshop)	Programming Languages	Freiburg	3 days	Jun 02, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Compact Python for Embedded	WO (Workshop)	Programming Languages	Frankfurt / Main	3 days	Sep 22, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Compact Python for Embedded	WO (Workshop)	Programming Languages	Berlin	3 days	Nov 24, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Compact Python for Embedded	OL (Online Live)	Programming Languages	Online	3 days	Mar 24, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Compact Python for Embedded	OL (Online Live)	Programming Languages	Online	3 days	Jun 02, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Compact Python for Embedded	OL (Online Live)	Programming Languages	Online	3 days	Sep 22, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Compact Python for Embedded	OL (Online Live)	Programming Languages	Online	3 days	Nov 24, 2025	Info FPGA SoC MPSoC Script Scripting Automation Tool CI Continuous Integration Build System Embedded open-source open source interpreter object oriented library
Designing with Ethernet MAC Controllers	WO (Workshop)	Connectivity	Stuttgart	2 days	May 19, 2025	Info Connectivity Ethernet udp tcp layer high-speed highspeed protocol Phy GMII SGMII MAC UDP TCP/IP
Designing with Ethernet MAC Controllers	WO (Workshop)	Connectivity	Berlin	2 days	Sep 09, 2025	Info Connectivity Ethernet udp tcp layer high-speed highspeed protocol Phy GMII SGMII MAC UDP TCP/IP
Designing with Ethernet MAC Controllers	WO (Workshop)	Connectivity	Freiburg	2 days	Nov 20, 2025	Info Connectivity Ethernet udp tcp layer high-speed highspeed protocol Phy GMII SGMII MAC UDP TCP/IP
Designing with Ethernet MAC Controllers	OL (Online Live)	Connectivity	Online	2 days	May 19, 2025	Info Connectivity Ethernet udp tcp layer high-speed highspeed protocol Phy GMII SGMII MAC UDP TCP/IP
Designing with Ethernet MAC Controllers	OL (Online Live)	Connectivity	Online	2 days	Sep 09, 2025	Info Connectivity Ethernet udp tcp layer high-speed highspeed protocol Phy GMII SGMII MAC UDP TCP/IP
Designing with Ethernet MAC Controllers	OL (Online Live)	Connectivity	Online	2 days	Nov 20, 2025	Info Connectivity Ethernet udp tcp layer high-speed highspeed protocol Phy GMII SGMII MAC UDP TCP/IP
Compact Zynq UltraScale+ RFSoC	WO (Workshop)	Connectivity	Munich	3 days	Mar 11, 2025	Info RFSoC ADC DAC RF UltraScale+ Data Converter
Compact Zynq UltraScale+ RFSoC	WO (Workshop)	Connectivity	Freiburg	3 days	May 12, 2025	Info RFSoC ADC DAC RF UltraScale+ Data Converter
Compact Zynq UltraScale+ RFSoC	WO (Workshop)	Connectivity	Frankfurt / Main	3 days	Sep 22, 2025	Info RFSoC ADC DAC RF UltraScale+ Data Converter
Compact Zynq UltraScale+ RFSoC	WO (Workshop)	Connectivity	Munich	3 days	Dec 01, 2025	Info RFSoC ADC DAC RF UltraScale+ Data Converter
Compact Zynq UltraScale+ RFSoC	OL (Online Live)	Connectivity	Online	3 days	Mar 11, 2025	Info RFSoC ADC DAC RF UltraScale+ Data Converter
Compact Zynq UltraScale+ RFSoC	OL (Online Live)	Connectivity	Online	3 days	May 12, 2025	Info RFSoC ADC DAC RF UltraScale+ Data Converter
Compact Zynq UltraScale+ RFSoC	OL (Online Live)	Connectivity	Online	3 days	Sep 22, 2025	Info RFSoC ADC DAC RF UltraScale+ Data Converter
Compact Zynq UltraScale+ RFSoC	OL (Online Live)	Connectivity	Online	3 days	Dec 01, 2025	Info RFSoC ADC DAC RF UltraScale+ Data Converter
Compact Versal Adaptive SoC: Power and Board Design	WO (Workshop)	Connectivity		3 days	all year on request	Info Embedded ACAP board design integrity power Versal Cortex-A72 Cortex-R5 NoC DDR4 AXI XPE power design Power Supply PDM Signal Integrity Reflection Crosstalk IBIS
Compact Versal Adaptive SoC: Power and Board Design	OL (Online Live)	Connectivity	Online	3 days	all year on request	Info Embedded ACAP board design integrity power Versal Cortex-A72 Cortex-R5 NoC DDR4 AXI XPE power design Power Supply PDM Signal Integrity Reflection Crosstalk IBIS
Compact Versal Adaptive SoC: Connectivity	WO (Workshop)	Connectivity	Berlin	3 days	Apr 07, 2025	Info Versal High-Speed Interfaces ACAP 10GE 100GE 400GE MAC PCS FEC transceiver PLL hard IP Aurora DDR4 memory interface VCK190 Gigabit Ethernet
Compact Versal Adaptive SoC: Connectivity	WO (Workshop)	Connectivity	Frankfurt / Main	3 days	Aug 25, 2025	Info Versal High-Speed Interfaces ACAP 10GE 100GE 400GE MAC PCS FEC transceiver PLL hard IP Aurora DDR4 memory interface VCK190 Gigabit Ethernet
Compact Versal Adaptive SoC: Connectivity	WO (Workshop)	Connectivity	Stuttgart	3 days	Nov 10, 2025	Info Versal High-Speed Interfaces ACAP 10GE 100GE 400GE MAC PCS FEC transceiver PLL hard IP Aurora DDR4 memory interface VCK190 Gigabit Ethernet
Compact Versal Adaptive SoC: Connectivity	OL (Online Live)	Connectivity	Online	3 days	Apr 07, 2025	Info Versal High-Speed Interfaces ACAP 10GE 100GE 400GE MAC PCS FEC transceiver PLL hard IP Aurora DDR4 memory interface VCK190 Gigabit Ethernet
Compact Versal Adaptive SoC: Connectivity	OL (Online Live)	Connectivity	Online	3 days	Aug 25, 2025	Info Versal High-Speed Interfaces ACAP 10GE 100GE 400GE MAC PCS FEC transceiver PLL hard IP Aurora DDR4 memory interface VCK190 Gigabit Ethernet
Compact Versal Adaptive SoC: Connectivity	OL (Online Live)	Connectivity	Online	3 days	Nov 10, 2025	Info Versal High-Speed Interfaces ACAP 10GE 100GE 400GE MAC PCS FEC transceiver PLL hard IP Aurora DDR4 memory interface VCK190 Gigabit Ethernet
Compact UltraScale: Serial Transceivers	WO (Workshop)	Connectivity	Munich	3 days	Feb 24, 2025	Info UltraScale Serial Transceiver GTX GTH GTY 8B/10B 64B/66B 64B/67B UltraScale+ gearbox PLL KCU105
Compact UltraScale: Serial Transceivers	WO (Workshop)	Connectivity	Berlin	3 days	May 05, 2025	Info UltraScale Serial Transceiver GTX GTH GTY 8B/10B 64B/66B 64B/67B UltraScale+ gearbox PLL KCU105
Compact UltraScale: Serial Transceivers	WO (Workshop)	Connectivity	Frankfurt / Main	3 days	Sep 15, 2025	Info UltraScale Serial Transceiver GTX GTH GTY 8B/10B 64B/66B 64B/67B UltraScale+ gearbox PLL KCU105
Compact UltraScale: Serial Transceivers	OL (Online Live)	Connectivity	Online	3 days	Feb 24, 2025	Info UltraScale Serial Transceiver GTX GTH GTY 8B/10B 64B/66B 64B/67B UltraScale+ gearbox PLL KCU105
Compact UltraScale: Serial Transceivers	OL (Online Live)	Connectivity	Online	3 days	May 05, 2025	Info UltraScale Serial Transceiver GTX GTH GTY 8B/10B 64B/66B 64B/67B UltraScale+ gearbox PLL KCU105
Compact UltraScale: Serial Transceivers	OL (Online Live)	Connectivity	Online	3 days	Sep 15, 2025	Info UltraScale Serial Transceiver GTX GTH GTY 8B/10B 64B/66B 64B/67B UltraScale+ gearbox PLL KCU105
Compact UltraScale: High-Speed Memory Interfacing	WO (Workshop)	Connectivity		3 days	all year on request	Info 7Series DDR3 memory Memory Controller PCB Design PCB Design Rules Debugging DDR3 UltraScale UltraScale+ DDR4 memory
Compact UltraScale: High-Speed Memory Interfacing	OL (Online Live)	Connectivity	Online	3 days	all year on request	Info 7Series DDR3 memory Memory Controller PCB Design PCB Design Rules Debugging DDR3 UltraScale UltraScale+ DDR4 memory
Compact UltraScale: Board Design and Signal Integrity	WO (Workshop)	Connectivity		3 days	all year on request	Info UltraScale Power Supply board design power integrity Signal Integrity Reflection Crosstalk HyperLynx IBIS AMI Models PCB Simulation High-Speed Interfaces Transceiver PCI Express DDR4 PCB Design UltraScale+ board design power design Power Supply XPE Signal Integrity Reflection Crosstalk IBIS
Compact UltraScale: Board Design and Signal Integrity	OL (Online Live)	Connectivity	Online	3 days	all year on request	Info UltraScale Power Supply board design power integrity Signal Integrity Reflection Crosstalk HyperLynx IBIS AMI Models PCB Simulation High-Speed Interfaces Transceiver PCI Express DDR4 PCB Design UltraScale+ board design power design Power Supply XPE Signal Integrity Reflection Crosstalk IBIS
AXI Interface Technology	WO (Workshop)	Connectivity	Freiburg	2 days	Mar 17, 2025	Info FPGA AXI Interface Protocoll Protocol AMBA stream streaming lite full valid ready channels interconnect latency interface bus connectivity optimization sharing DDRAM performance
AXI Interface Technology	WO (Workshop)	Connectivity	Frankfurt / Main	2 days	Jun 10, 2025	Info FPGA AXI Interface Protocoll Protocol AMBA stream streaming lite full valid ready channels interconnect latency interface bus connectivity optimization sharing DDRAM performance
AXI Interface Technology	WO (Workshop)	Connectivity	Berlin	2 days	Sep 11, 2025	Info FPGA AXI Interface Protocoll Protocol AMBA stream streaming lite full valid ready channels interconnect latency interface bus connectivity optimization sharing DDRAM performance
AXI Interface Technology	WO (Workshop)	Connectivity	Munich	2 days	Nov 06, 2025	Info FPGA AXI Interface Protocoll Protocol AMBA stream streaming lite full valid ready channels interconnect latency interface bus connectivity optimization sharing DDRAM performance
AXI Interface Technology	OL (Online Live)	Connectivity	Online	2 days	Mar 17, 2025	Info FPGA AXI Interface Protocoll Protocol AMBA stream streaming lite full valid ready channels interconnect latency interface bus connectivity optimization sharing DDRAM performance
AXI Interface Technology	OL (Online Live)	Connectivity	Online	2 days	Jun 10, 2025	Info FPGA AXI Interface Protocoll Protocol AMBA stream streaming lite full valid ready channels interconnect latency interface bus connectivity optimization sharing DDRAM performance
AXI Interface Technology	OL (Online Live)	Connectivity	Online	2 days	Sep 11, 2025	Info FPGA AXI Interface Protocoll Protocol AMBA stream streaming lite full valid ready channels interconnect latency interface bus connectivity optimization sharing DDRAM performance
AXI Interface Technology	OL (Online Live)	Connectivity	Online	2 days	Nov 06, 2025	Info FPGA AXI Interface Protocoll Protocol AMBA stream streaming lite full valid ready channels interconnect latency interface bus connectivity optimization sharing DDRAM performance
Compact UltraScale: Integrated PCI Express Systems	WO (Workshop)	Connectivity	Stuttgart	3 days	Feb 10, 2025	Info UltraScale PCI Express Integrated Block for PCI Express Gen3 PL PCIe UltraScale+ PCIe endpoint root port DMA KCU105
Compact UltraScale: Integrated PCI Express Systems	WO (Workshop)	Connectivity	Freiburg	3 days	May 19, 2025	Info UltraScale PCI Express Integrated Block for PCI Express Gen3 PL PCIe UltraScale+ PCIe endpoint root port DMA KCU105
Compact UltraScale: Integrated PCI Express Systems	WO (Workshop)	Connectivity	Munich	3 days	Sep 01, 2025	Info UltraScale PCI Express Integrated Block for PCI Express Gen3 PL PCIe UltraScale+ PCIe endpoint root port DMA KCU105
Compact UltraScale: Integrated PCI Express Systems	WO (Workshop)	Connectivity	Berlin	3 days	Dec 08, 2025	Info UltraScale PCI Express Integrated Block for PCI Express Gen3 PL PCIe UltraScale+ PCIe endpoint root port DMA KCU105
Compact UltraScale: Integrated PCI Express Systems	OL (Online Live)	Connectivity	Online	3 days	Feb 10, 2025	Info UltraScale PCI Express Integrated Block for PCI Express Gen3 PL PCIe UltraScale+ PCIe endpoint root port DMA KCU105
Compact UltraScale: Integrated PCI Express Systems	OL (Online Live)	Connectivity	Online	3 days	May 19, 2025	Info UltraScale PCI Express Integrated Block for PCI Express Gen3 PL PCIe UltraScale+ PCIe endpoint root port DMA KCU105
Compact UltraScale: Integrated PCI Express Systems	OL (Online Live)	Connectivity	Online	3 days	Sep 01, 2025	Info UltraScale PCI Express Integrated Block for PCI Express Gen3 PL PCIe UltraScale+ PCIe endpoint root port DMA KCU105
Compact UltraScale: Integrated PCI Express Systems	OL (Online Live)	Connectivity	Online	3 days	Dec 08, 2025	Info UltraScale PCI Express Integrated Block for PCI Express Gen3 PL PCIe UltraScale+ PCIe endpoint root port DMA KCU105
FPGA Designer (Long Term)	LT (Long Term Education)	Development Tools & Methodology	Freiburg	8 dates of 2 days each	Mar 10, 2025	Info
FPGA Designer (Long Term)	LT (Long Term Education)	Development Tools & Methodology	Freiburg	8 dates of 2 days each	Sep 09, 2025	Info
Embedded Designer (Long Term)	LT (Long Term Education)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	8 dates of 2 days each	Apr 03, 2025	Info
Embedded Designer (Long Term)	LT (Long Term Education)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Freiburg	8 dates of 2 days each	Oct 01, 2025	Info
Compact Vivado Design Suite Tool Flow	WO (Workshop)	Development Tools & Methodology	Freiburg	2 days	Feb 17, 2025	Info Vivado FPGA Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL XDC project mode non-project-mode
Compact Vivado Design Suite Tool Flow	WO (Workshop)	Development Tools & Methodology	Frankfurt / Main	2 days	Jun 23, 2025	Info Vivado FPGA Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL XDC project mode non-project-mode
Compact Vivado Design Suite Tool Flow	WO (Workshop)	Development Tools & Methodology	Stuttgart	2 days	Sep 15, 2025	Info Vivado FPGA Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL XDC project mode non-project-mode
Compact Vivado Design Suite Tool Flow	WO (Workshop)	Development Tools & Methodology	Munich	2 days	Nov 17, 2025	Info Vivado FPGA Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL XDC project mode non-project-mode
Compact Vivado Design Suite Tool Flow	OL (Online Live)	Development Tools & Methodology	Online	2 days	Feb 17, 2025	Info Vivado FPGA Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL XDC project mode non-project-mode
Compact Vivado Design Suite Tool Flow	OL (Online Live)	Development Tools & Methodology	Online	2 days	Jun 23, 2025	Info Vivado FPGA Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL XDC project mode non-project-mode
Compact Vivado Design Suite Tool Flow	OL (Online Live)	Development Tools & Methodology	Online	2 days	Sep 15, 2025	Info Vivado FPGA Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL XDC project mode non-project-mode
Compact Vivado Design Suite Tool Flow	OL (Online Live)	Development Tools & Methodology	Online	2 days	Nov 17, 2025	Info Vivado FPGA Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL XDC project mode non-project-mode
Compact Timing Constraints and Analysis	WO (Workshop)	Development Tools & Methodology	Freiburg	3 days	Feb 19, 2025	Info Vivado Timing Constraints Tool STA TCL XDC static timing analysis timing closure timing summary clock interaction
Compact Timing Constraints and Analysis	WO (Workshop)	Development Tools & Methodology	Frankfurt / Main	3 days	Jun 25, 2025	Info Vivado Timing Constraints Tool STA TCL XDC static timing analysis timing closure timing summary clock interaction
Compact Timing Constraints and Analysis	WO (Workshop)	Development Tools & Methodology	Stuttgart	3 days	Sep 17, 2025	Info Vivado Timing Constraints Tool STA TCL XDC static timing analysis timing closure timing summary clock interaction
Compact Timing Constraints and Analysis	WO (Workshop)	Development Tools & Methodology	Munich	3 days	Nov 19, 2025	Info Vivado Timing Constraints Tool STA TCL XDC static timing analysis timing closure timing summary clock interaction
Compact Timing Constraints and Analysis	OL (Online Live)	Development Tools & Methodology	Online	3 days	Feb 19, 2025	Info Vivado Timing Constraints Tool STA TCL XDC static timing analysis timing closure timing summary clock interaction
Compact Timing Constraints and Analysis	OL (Online Live)	Development Tools & Methodology	Online	3 days	Jun 25, 2025	Info Vivado Timing Constraints Tool STA TCL XDC static timing analysis timing closure timing summary clock interaction
Compact Timing Constraints and Analysis	OL (Online Live)	Development Tools & Methodology	Online	3 days	Sep 17, 2025	Info Vivado Timing Constraints Tool STA TCL XDC static timing analysis timing closure timing summary clock interaction
Compact Timing Constraints and Analysis	OL (Online Live)	Development Tools & Methodology	Online	3 days	Nov 19, 2025	Info Vivado Timing Constraints Tool STA TCL XDC static timing analysis timing closure timing summary clock interaction
FPGA Circuit Design Technique	SE (Seminar)	Development Tools & Methodology	Stuttgart	1 day	Mar 25, 2025	Info FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung IP Core
FPGA Circuit Design Technique	SE (Seminar)	Development Tools & Methodology	Freiburg	1 day	Sep 24, 2025	Info FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung IP Core
Professional Vivado	PW (Power Workshop)	Development Tools & Methodology	Freiburg	5 days	Mar 10, 2025	Info Vivado Clock Interaction Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL FPGA XDC project mode non-project-mode timing constraints STA static timing analysis timing closure timing summary
Professional Vivado	PW (Power Workshop)	Development Tools & Methodology	Frankfurt / Main	5 days	Jul 07, 2025	Info Vivado Clock Interaction Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL FPGA XDC project mode non-project-mode timing constraints STA static timing analysis timing closure timing summary
Professional Vivado	PW (Power Workshop)	Development Tools & Methodology	Freiburg	5 days	Oct 20, 2025	Info Vivado Clock Interaction Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL FPGA XDC project mode non-project-mode timing constraints STA static timing analysis timing closure timing summary
Professional Vivado	PW (Power Workshop)	Development Tools & Methodology	Frankfurt / Main	5 days	Dec 01, 2025	Info Vivado Clock Interaction Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL FPGA XDC project mode non-project-mode timing constraints STA static timing analysis timing closure timing summary
Professional Vivado	OL (Online Live)	Development Tools & Methodology	Online	5 days	Mar 10, 2025	Info Vivado Clock Interaction Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL FPGA XDC project mode non-project-mode timing constraints STA static timing analysis timing closure timing summary
Professional Vivado	OL (Online Live)	Development Tools & Methodology	Online	5 days	Jul 07, 2025	Info Vivado Clock Interaction Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL FPGA XDC project mode non-project-mode timing constraints STA static timing analysis timing closure timing summary
Professional Vivado	OL (Online Live)	Development Tools & Methodology	Online	5 days	Oct 20, 2025	Info Vivado Clock Interaction Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL FPGA XDC project mode non-project-mode timing constraints STA static timing analysis timing closure timing summary
Professional Vivado	OL (Online Live)	Development Tools & Methodology	Online	5 days	Dec 01, 2025	Info Vivado Clock Interaction Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL FPGA XDC project mode non-project-mode timing constraints STA static timing analysis timing closure timing summary
Professional Vitis	PW (Power Workshop)	Development Tools & Methodology	Frankfurt / Main	5 days	Mar 17, 2025	Info Vitis Embedded Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library Linux PetaLinux Boot Bootflow elf c/c++ Standalone Debugging Profiling Acceleration XRT
Professional Vitis	PW (Power Workshop)	Development Tools & Methodology	Stuttgart	5 days	Jun 23, 2025	Info Vitis Embedded Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library Linux PetaLinux Boot Bootflow elf c/c++ Standalone Debugging Profiling Acceleration XRT
Professional Vitis	PW (Power Workshop)	Development Tools & Methodology	Freiburg	5 days	Aug 25, 2025	Info Vitis Embedded Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library Linux PetaLinux Boot Bootflow elf c/c++ Standalone Debugging Profiling Acceleration XRT
Professional Vitis	PW (Power Workshop)	Development Tools & Methodology	Berlin	5 days	Nov 10, 2025	Info Vitis Embedded Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library Linux PetaLinux Boot Bootflow elf c/c++ Standalone Debugging Profiling Acceleration XRT
Professional Vitis	OL (Online Live)	Development Tools & Methodology	Online	5 days	Mar 17, 2025	Info Vitis Embedded Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library Linux PetaLinux Boot Bootflow elf c/c++ Standalone Debugging Profiling Acceleration XRT
Professional Vitis	OL (Online Live)	Development Tools & Methodology	Online	5 days	Jun 23, 2025	Info Vitis Embedded Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library Linux PetaLinux Boot Bootflow elf c/c++ Standalone Debugging Profiling Acceleration XRT
Professional Vitis	OL (Online Live)	Development Tools & Methodology	Online	5 days	Aug 25, 2025	Info Vitis Embedded Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library Linux PetaLinux Boot Bootflow elf c/c++ Standalone Debugging Profiling Acceleration XRT
Professional Vitis	OL (Online Live)	Development Tools & Methodology	Online	5 days	Nov 10, 2025	Info Vitis Embedded Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library Linux PetaLinux Boot Bootflow elf c/c++ Standalone Debugging Profiling Acceleration XRT
Professional FPGA Circuit Design Technique	PW (Power Workshop)	Development Tools & Methodology	Freiburg	5 days	Feb 10, 2025	Info FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung architecture clocking synchronizer circuits IO Ultrascale Ultrascale+
Professional FPGA Circuit Design Technique	PW (Power Workshop)	Development Tools & Methodology	Freiburg	5 days	Apr 07, 2025	Info FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung architecture clocking synchronizer circuits IO Ultrascale Ultrascale+
Professional FPGA Circuit Design Technique	PW (Power Workshop)	Development Tools & Methodology	Freiburg	5 days	Jul 07, 2025	Info FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung architecture clocking synchronizer circuits IO Ultrascale Ultrascale+
Professional FPGA Circuit Design Technique	PW (Power Workshop)	Development Tools & Methodology	Freiburg	5 days	Nov 03, 2025	Info FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung architecture clocking synchronizer circuits IO Ultrascale Ultrascale+
Professional FPGA Circuit Design Technique	OL (Online Live)	Development Tools & Methodology	Online	5 days	Feb 10, 2025	Info FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung architecture clocking synchronizer circuits IO Ultrascale Ultrascale+
Professional FPGA Circuit Design Technique	OL (Online Live)	Development Tools & Methodology	Online	5 days	Apr 07, 2025	Info FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung architecture clocking synchronizer circuits IO Ultrascale Ultrascale+
Professional FPGA Circuit Design Technique	OL (Online Live)	Development Tools & Methodology	Online	5 days	Jul 07, 2025	Info FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung architecture clocking synchronizer circuits IO Ultrascale Ultrascale+
Professional FPGA Circuit Design Technique	OL (Online Live)	Development Tools & Methodology	Online	5 days	Nov 03, 2025	Info FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung architecture clocking synchronizer circuits IO Ultrascale Ultrascale+
Git for EDA Tool Flows	WO (Workshop)	Development Tools & Methodology	Stuttgart	3 days	Mar 10, 2025	Info Git Tools Versioning Version Control Scripting Script GitLab SmartGit Branching Merging
Git for EDA Tool Flows	WO (Workshop)	Development Tools & Methodology	Berlin	3 days	Jun 24, 2025