Menu

Dynamic Function eXchange (DFX)

Workshop


Online Live

This course demonstrates how to use the Vivado™ design suite to construct, implement, and download a Partially reconfigurable (PR) FPGA design. You will gain a firm understanding of PR technology and learn how successful PR designs are completed. You will also identify best design practices and understand the subtleties of the PR design flow.

This course covers both the tool flow and mechanics of successfully creating a PR design. It also describes several techniques focusing on appropriate coding styles for a PR system, as well as system-level design considerations and practical applications. The PR design approach allows strategies for non-realtime multiplexing hardware functions by exchanging partial bitstream configuration files. This is an advanced methodology for in-system programming FPGA devices.

Due to accompanying exercises, the course offers in-depth and practice-oriented training. Attendees of the online live course will do the practical exercises in the afternoon on their own.

Course language: German (English possible on request)

Portrait von Michael Schwarz

Contact

Michael Schwarz

+49 7664 91313-15

michael.schwarz@plc2.de

Details

Applicable technologies

AMD FPGAs and adaptive SoCs,
Kria™ SoMs

Requirements

Basic knowledge of FPGA technology and in VHDL or Verilog
Basic knowledge of the Vivado™ design flow

Duration

2 days

Fee (net per person)

€ 1,700

Inclusive

Training material
Plus beverages during breaks
Lunch

Agenda

01

Partial reconfiguration overview

02

Partial reconfiguration tool flow

03

Partial reconfiguration bitstreams

04

Managing timing for partial reconfiguration

05

Partial reconfiguration in embedded systems

06

Dynamic function eXchange in Vitis™

07

Debugging partial reconfiguration designs

08

Partial reconfiguration design recommendations

09

PCIe® core inclusion with partial reconfiguration

Dates

Dynamic Function eXchange (DFX)

WO

Frankfurt / Main

Apr 11, 2024

Book now

Dynamic Function eXchange (DFX)

WO

Stuttgart

Jul 08, 2024

Book now

Dynamic Function eXchange (DFX)

WO

Freiburg

Oct 01, 2024

Book now

Booking

DE EN

Company

Contact Person

Request / Offer

Billing Address

Billing Person

Participant(s)

Fee

Participant

 

€ 1,700

Course

Dynamic Function eXchange (DFX)_WO

Total fee

€ 1,700

*Required field

Unternehmen

Ansprechpartner:in

Anfrage / Angebot

Rechnungsanschrift

Ansprechpartner:in

Teilnehmer:innnen

Kosten

Teilnehmer:in

 

€ 1,700

Kurs

Dynamic Function eXchange (DFX)_WO

Gesamtbetrag

€ 1,700

*Pflichtfeld

This might also interest you...

Course Format Category Location Duration Date

Compact FPGA Circuit Design Technique

OL (Online Live)

Development
Tools & Methodology

Online

3 days

Jun 10, 2024

Info

FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung architecture clocking synchronizer circuits IO Ultrascale Ultrascale+

Compact FPGA Circuit Design Technique

OL (Online Live)

Development
Tools & Methodology

Online

3 days

Sep 16, 2026

Info

FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung architecture clocking synchronizer circuits IO Ultrascale Ultrascale+

Compact FPGA Circuit Design Technique

OL (Online Live)

Development
Tools & Methodology

Online

3 days

Dec 09, 2024

Info

FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung architecture clocking synchronizer circuits IO Ultrascale Ultrascale+

Compact FPGA Circuit Design Technique

WO (Workshop)

Development
Tools & Methodology

Frankfurt / Main

3 days

May 22, 2024

Info

FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung architecture clocking synchronizer circuits IO Ultrascale Ultrascale+

Compact FPGA Circuit Design Technique

WO (Workshop)

Development
Tools & Methodology

Stuttgart

3 days

Aug 05, 2024

Info

FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung architecture clocking synchronizer circuits IO Ultrascale Ultrascale+

Compact FPGA Circuit Design Technique

WO (Workshop)

Development
Tools & Methodology

Berlin

3 days

Oct 09, 2024

Info

FPGA Clock Domain Crossing Flip Flop Architecture LUT BRAM Ressources CDC XDC reset Takt clock FPGA Architektur Schaltungsentwurf Schaltung architecture clocking synchronizer circuits IO Ultrascale Ultrascale+

Compact Zynq UltraScale+ MPSoC for the Hardware Designer

OL (Online Live)

Embedded for AMD (Adaptive) SoCs & MPSoCs

Online

3 days

Jul 15, 2024

Info

Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE

Compact Zynq UltraScale+ MPSoC for the Hardware Designer

OL (Online Live)

Embedded for AMD (Adaptive) SoCs & MPSoCs

Online

3 days

Oct 14, 2024

Info

Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE

Compact Zynq UltraScale+ MPSoC for the Hardware Designer

WO (Workshop)

Embedded for AMD (Adaptive) SoCs & MPSoCs

Freiburg

3 days

May 06, 2024

Info

Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE

Compact Zynq UltraScale+ MPSoC for the Hardware Designer

WO (Workshop)

Embedded for AMD (Adaptive) SoCs & MPSoCs

Berlin

3 days

Aug 20, 2024

Info

Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE

Compact Zynq UltraScale+ MPSoC for the Hardware Designer

WO (Workshop)

Embedded for AMD (Adaptive) SoCs & MPSoCs

Munich

3 days

Nov 25, 2024

Info

Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Peripheral PS PMU AXI Power IP-Integrator ACE

Professional Vivado

OL (Online Live)

Development
Tools & Methodology

Online

5 days

Oct 07, 2024

Info

Vivado Clock Interaction Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL FPGA XDC project mode non-project-mode timing constraints STA static timing analysis timing closure timing summary

Professional Vivado

PW (Power Workshop)

Development
Tools & Methodology

Frankfurt / Main

5 days

Jul 22, 2024

Info

Vivado Clock Interaction Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL FPGA XDC project mode non-project-mode timing constraints STA static timing analysis timing closure timing summary

Professional Vivado

PW (Power Workshop)

Development
Tools & Methodology

Freiburg

5 days

Oct 07, 2024

Info

Vivado Clock Interaction Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL FPGA XDC project mode non-project-mode timing constraints STA static timing analysis timing closure timing summary

Professional Vivado

PW (Power Workshop)

Development
Tools & Methodology

Frankfurt / Main

5 days

Dec 09, 2024

Info

Vivado Clock Interaction Tool Synthesis Implementation Blockdiagram Blockdesign IPI IP Core Integrator Design Flow Simulation Xsim Simulator TCL FPGA XDC project mode non-project-mode timing constraints STA static timing analysis timing closure timing summary

Compact Timing Constraints and Analysis

OL (Online Live)

Development
Tools & Methodology

Online

3 days

Jul 24, 2024

Info

Vivado Timing Constraints Tool STA TCL XDC static timing analysis timing closure timing summary clock interaction

Compact Timing Constraints and Analysis

OL (Online Live)

Development
Tools & Methodology

Online

3 days

Oct 09, 2024

Info

Vivado Timing Constraints Tool STA TCL XDC static timing analysis timing closure timing summary clock interaction

Compact Timing Constraints and Analysis

WO (Workshop)

Development
Tools & Methodology

Frankfurt / Main

3 days

Jun 05, 2024

Info

Vivado Timing Constraints Tool STA TCL XDC static timing analysis timing closure timing summary clock interaction

Compact Timing Constraints and Analysis

WO (Workshop)

Development
Tools & Methodology

Stuttgart

3 days

Sep 18, 2024

Info

Vivado Timing Constraints Tool STA TCL XDC static timing analysis timing closure timing summary clock interaction

Compact Timing Constraints and Analysis

WO (Workshop)

Development
Tools & Methodology

Munich

3 days

Nov 06, 2024

Info

Vivado Timing Constraints Tool STA TCL XDC static timing analysis timing closure timing summary clock interaction

showing: 1 to 2 (2)

How can we help?

Contact

FAQ

01. Can you help me with reserving the room?

If you need a room for a face-to-face course, please contact us. We will support you in choosing suitable accommodation.

02. What times in the day do courses start and end?

Our face-to-face courses start daily at 9 a.m. (CET/CEST) and end at 5 p.m., with two coffee breaks and an extended lunch break. The total course time per day is 6 hours. For online courses, the start is also at 9 a.m. (CET/CEST), but they end at 2:30 p.m.. The total course time per day is 4 and a half hours plus breaks.

03. Are course materials provided?

All participants of paid courses will receive English training materials in electronic or paper form.

04. Will I receive a course certificate?

Each participant of a paid PLC2 course will receive a signed certificate of attendance at the end of the course.

05. Can I pay with Training Credits (TCs)?

Of course, you can also pay for your training using your available TCs (Training Credits). We will then invoice AMD directly. If you do not have sufficient credit for the booked training, the difference can be paid for with an additional payment. The additional charge will be invoiced directly to you.

06. What are the options for payment?

You can pay us via bank transfer or with TCs (Training Credits). Unfortunately, payment via debit, credit card, or PayPal is not possible.

07. What is the deadline for payment?

Payment is due 14 days after the invoice date, without deduction. Please transfer the amount within that time.

08. What are the options for cancelling?

You can cancel free of charge up to 14 days before the course starts. If you have to cancel at short notice due to illness or other reasons, you have the option of adding a substitute participant or of making up the course at a later date (within 6 months).

09. When will I receive a firm commitment as to whether the course will take place?

You will receive binding confirmation 7 days before the course begins as to whether it will go ahead.

10. How many participants are required for a course to be given/what is the minimum number of participants?

We generally offer courses for 5 or more people. That means that if you would like to book a course at your premises, you need 5 people to register or need to pay the amount for 5 participants, even if fewer people attend.

11. Can I book a course that is given in English?

If you need a course that is officially advertised as given in German to be given in English, please contact us. We will try to make that possible for you.

12. What language is the course in?

Our webinars and online courses are conducted in English. All our F2F training courses are generally conducted in German. Feel free to contact us if you need face-to-face training in English or online training in German.