AMD (Adaptive) SoC, MPSoC & FPGA Architecture

Versal Adaptive SoC for the System Architect

Workshop

Online Live

With Versal™ adaptive SoC, AMD offers a highly integrated technology, the adaptive compute acceleration platform. The devices of this family exhibit a heterogeneous architecture of compute engines on a common programmable infrastructure. This workshop describes the adaptive SoC architecture to foster insight into the optimal assignment of the available building blocks for demanding tasks.

Versal™ offers a high-performant multiprocessor Arm® cluster as evolved from the Zynq™ technologies and adds further hardened IPs beyond the well established Programmable Logic (PL) to further support designs with various computation requirements. The range of IPs allows on device High Bandwidth Memory (HBM) to the highest speed transceiver up to 112 Gbps, depending on the particular choice of a respective subfamily. For compute intense challenges, specific IPs (AI Engines) are available, to accelerate tasks deploying large vectorization gains. All compute engines are supported by a device-wide Network on Chip (NoC) to guarantee bandwidth within the device, to expose memory controllers and help with timing closure in the design. The programmability of this infrastructure constitutes a flexible hardware platform.

This platform concept is further supported by a full stack of software and hardware functions to allow focus on application development. For best results, the partitioning of an application needs to be derived along tasks that can benefit from the respective Versal™ features. This approach to designing with these devices is shown from platform generation to integration, adding simulation and debugging insights. The workshop is particularly suitable for system engineers and developers in the planning phase of complex applications.

Due to accompanying exercises, the course offers in-depth and practice-oriented training.

Course language: German (English possible on request)

Book workshop

Contact

Michael Schwarz

+49 7664 91313-15

michael.schwarz@plc2.de

Details

Applicable technologies

AMD Versal™ adaptive SoC

Requirements

Basic knowledge in processor system architecture and AMD FPGA architecture
Basic knowledge of the programming language C/C++

Duration

2 days

Fee (net per person)

€ 1,700

Inclusive

Training material
Plus beverages during breaks
Lunch

Agenda

Introduction to Versal™ adaptive SoC

Versal™ architecture overview

Versal™ adaptable engines (PL)

IO connectivity and timer resources

Processing system

PMC, boot and configuration

System interrupts

Intelligent engines

NoC introduction and device memory

Serial transceivers

Introduction to PCIe®, CPM, and CCIX

Security features

System and solution planning – application partitioning

Hardware, IP, and platform development methodology

System integration and validation methodology

Exercises

01. Design tool flow
02. Application development
03. NoC introduction
04. System Level Simulation
05. Versal™ adaptive SoC platform creation

Dates

Versal Adaptive SoC for the System Architect

Munich

Nov 18, 2024

Book now

Versal Adaptive SoC for the System Architect

Freiburg

Jan 20, 2025

Book now

Available formats for this training

Versal Adaptive SoC for the System Architect

2 days

€ 1,700

Workshop

Versal Adaptive SoC for the System Architect

2 days

€ 1,300

Online Live

This might also interest you...

Course	Format	Category	Location	Duration	Date
Professional Versal Adaptive SoC	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	Nov 11, 2024	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC Acceleration & AI
Professional Versal Adaptive SoC	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	Mar 10, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC Acceleration & AI
Professional Versal Adaptive SoC	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	5 days	Nov 11, 2024	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC Acceleration & AI
Professional Versal Adaptive SoC	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Munich	5 days	Mar 10, 2025	Info Embedded ACAP Vitis tool flow Vivado Versal Cortex-A72 Cortex-R5 NoC CIPS AXI PMC Acceleration & AI
Advanced Versal Adaptive SoC AI Engine	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Dec 04, 2024	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP Acceleration & AI
Advanced Versal Adaptive SoC AI Engine	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Mar 17, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP Acceleration & AI
Advanced Versal Adaptive SoC AI Engine	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Munich	3 days	Dec 04, 2024	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP Acceleration & AI
Advanced Versal Adaptive SoC AI Engine	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	3 days	Mar 17, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP Acceleration & AI
Expert Versal Adaptive SoC AI Engine	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	5 days	Jan 27, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP , Acceleration & AI
Expert Versal Adaptive SoC AI Engine	PW (Power Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Stuttgart	5 days	Jan 27, 2025	Info Embedded ACAP CNN neuronal network ML KI Vitis AI Versal AI Engine Vector Processing DSP AI ML Acceleration DSP , Acceleration & AI
Compact Vitis AI	OL (Online Live)	Development Tools & Methodology	Online	3 days	Nov 04, 2024	Info Vitis AI AI Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library Kernel c/c++ machine learning ML inference on the edge neuronal networks CNN Deep Learning Processing Unit DPU quantization embedded software
Compact Vitis AI	OL (Online Live)	Development Tools & Methodology	Online	3 days	Mar 04, 2025	Info Vitis AI AI Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library Kernel c/c++ machine learning ML inference on the edge neuronal networks CNN Deep Learning Processing Unit DPU quantization embedded software
Compact Vitis AI	WO (Workshop)	Development Tools & Methodology	Berlin	3 days	Nov 04, 2024	Info Vitis AI AI Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library Kernel c/c++ machine learning ML inference on the edge neuronal networks CNN Deep Learning Processing Unit DPU quantization embedded software
Compact Vitis AI	WO (Workshop)	Development Tools & Methodology	Frankfurt / Main	3 days	Mar 04, 2025	Info Vitis AI AI Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library Kernel c/c++ machine learning ML inference on the edge neuronal networks CNN Deep Learning Processing Unit DPU quantization embedded software
Compact Embedded Linux	OL (Online Live)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Online	3 days	Nov 05, 2024	Info Embedded PetaLinux Vitis Linux OS Operating System Open Source OSS Driver Application Library Software Kernel Debugging Performance Boot Bootflow elf c c++ c/c++ Device Tree Devicetree Device-Tree Yocto tool flow Zynq SoC
Compact Embedded Linux	WO (Workshop)	Embedded for AMD (Adaptive) SoCs & MPSoCs	Berlin	3 days	Nov 05, 2024	Info Embedded PetaLinux Vitis Linux OS Operating System Open Source OSS Driver Application Library Software Kernel Debugging Performance Boot Bootflow elf c c++ c/c++ Device Tree Devicetree Device-Tree Yocto tool flow Zynq SoC
AXI Interface Technology	OL (Online Live)	Connectivity	Online	2 days	Dec 09, 2024	Info FPGA AXI Interface Protocoll Protocol AMBA stream streaming lite full valid ready channels interconnect latency interface bus connectivity optimization sharing DDRAM performance
AXI Interface Technology	OL (Online Live)	Connectivity	Online	2 days	Mar 17, 2025	Info FPGA AXI Interface Protocoll Protocol AMBA stream streaming lite full valid ready channels interconnect latency interface bus connectivity optimization sharing DDRAM performance
AXI Interface Technology	WO (Workshop)	Connectivity	Munich	2 days	Nov 28, 2024	Info FPGA AXI Interface Protocoll Protocol AMBA stream streaming lite full valid ready channels interconnect latency interface bus connectivity optimization sharing DDRAM performance
AXI Interface Technology	WO (Workshop)	Connectivity	Freiburg	2 days	Mar 17, 2025	Info FPGA AXI Interface Protocoll Protocol AMBA stream streaming lite full valid ready channels interconnect latency interface bus connectivity optimization sharing DDRAM performance
Items per page 10 25 50 100 prev next showing: 1 to 2 (2)

How can we help?

Contact

Call PLC2

+49 7664 91313-15

Send an e-mail

michael.schwarz@plc2.de

FAQ

01. Can you help me with reserving the room?

If you need a room for a face-to-face course, please contact us. We will support you in choosing suitable accommodation.

02. What times in the day do courses start and end?

Our face-to-face courses start daily at 9 a.m. (CET/CEST) and end at 5 p.m., with two coffee breaks and an extended lunch break. The total course time per day is 6 hours. For online courses, the start is also at 9 a.m. (CET/CEST), but they end at 2:30 p.m.. The total course time per day is 4 and a half hours plus breaks.

03. Are course materials provided?

All participants of paid courses will receive English training materials in electronic or paper form.

04. Will I receive a course certificate?

Each participant of a paid PLC2 course will receive a signed certificate of attendance at the end of the course.

05. Can I pay with Training Credits (TCs)?

Of course, you can also pay for your training using your available TCs (Training Credits). We will then invoice AMD directly. If you do not have sufficient credit for the booked training, the difference can be paid for with an additional payment. The additional charge will be invoiced directly to you.

06. What are the options for payment?

You can pay us via bank transfer or with TCs (Training Credits). Unfortunately, payment via debit, credit card, or PayPal is not possible.

07. What is the deadline for payment?

Payment is due 14 days after the invoice date, without deduction. Please transfer the amount within that time.

08. What are the options for cancelling?

You can cancel free of charge up to 14 days before the course starts. If you have to cancel at short notice due to illness or other reasons, you have the option of adding a substitute participant or of making up the course at a later date (within 6 months).

09. When will I receive a firm commitment as to whether the course will take place?

You will receive binding confirmation 7 days before the course begins as to whether it will go ahead.

10. How many participants are required for a course to be given/what is the minimum number of participants?

We generally offer courses for 5 or more people. That means that if you would like to book a course at your premises, you need 5 people to register or need to pay the amount for 5 participants, even if fewer people attend.

11. Can I book a course that is given in English?

If you need a course that is officially advertised as given in German to be given in English, please contact us. We will try to make that possible for you.

12. What language is the course in?

Our webinars and online courses are conducted in English. All our F2F training courses are generally conducted in German. Feel free to contact us if you need face-to-face training in English or online training in German.