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Advanced Zynq UltraScale+ MPSoC for the Software Designer | Online

Online Live


Workshop

This course explains the features of the CPUs in the processing system to effectively design embedded software for operating systems and complex applications.

In systems deploying multiple independent processors in operation, the designer must be aware of specific system design approaches to reach a mature design. E.g., the inter-processor communication requires a custom shared memory management and a protection of related peripherals. Schemes to achieve symmetric and asymmetric multi-processing OS operations are discussed, reviewing Linux or hypervisor architecture on application processor cores, FreeRTOS deployment especially on the real-time processing unit, and the respective software support. For generating a Linux OS, the various components need to be fetched, configured and built, also adopting the contributions of the customizable programmable hardware (PL). We will contrast the basic generation schemes, open source Linux kernel and rootfs vs. the build using Yocto and/or PetaLinux.

To productize these insights, the mechanisms of principal boot configurations are shown and elaborated. The boot process can be customized with focus on various non-volatile memories, multiple boot content, and allowing for non-secure or secure boot.

The course also introduces the basic options for configurable startup and runtime control to deploy the flexible operation of the multiple processors in the UltraScale+™ MPSoC architecture. A design may typically not be running in full performance mode simultaneously at all times but only for peak periods, so the power management of all device resources is software programmable and enables power scaling at runtime. The design approaches will be explored running and debugging in simulation supported by QEMU or on actual hardware targets – both are equally important tools along the design methodology.

Due to accompanying exercises, the course offers in-depth and practice-oriented training. Attendees of the online live training will perform the practical exercises in real time with instructor assistance.

Course language: German (English possible on request)

Michael Schwarz at PLC2

Contact

Michael Schwarz l Head of Training

+49 7664 91313-15

michael.schwarz@plc2.de

Details

Applicable technologies

AMD Zynq™ UltraScale+™ MPSoC and RFSoC

Requirements

Comfort with the C/C++ programming language
Conceptual understanding of the Zynq UltraScale+ MPSoC
Comfort with console scripting

Duration

3 days

Fee (net per person)

€ 2,100

Inclusive

Training material
Plus beverages during breaks
Lunch

Agenda

01

Zynq™ UltraScale+™ MPSoC review

02

Arm Cortex-A53 and -R5: features and modes

03

Arm® TrustZone® technology

04

Hardware and software virtualization

05

Hypervisor and XEN

06

Deploying OpenAMP in a heterogeneous system

07

Overview of embedded Linux development

08

Driving the PetaLinux tools

09

Linux Yocto Project

10

Linux Configurations and build flows

11

FreeRTOS

12

Platform Management Unit (PMU)

13

PMU Firmware and user Tasks

14

Multi-boot and secure boot

15

Details of FSBL, FSBL debugging

Dates

Advanced Zynq UltraScale+ MPSoC for the Software Designer | Online

OL

Online

Jun 15, 2026

Book now

Advanced Zynq UltraScale+ MPSoC for the Software Designer | Online

OL

Online

Sep 28, 2026

Book now

Advanced Zynq UltraScale+ MPSoC for the Software Designer | Online

OL

Online

Dec 01, 2026

Book now

Booking

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Request / Offer

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Billing Person

Participant(s)

Fee

Participant

 

€ 2,100

Course

Advanced Zynq UltraScale+ MPSoC for the Software Designer_OL

Total fee

€ 2,100

*Required field

Unternehmen

Ansprechpartner:in

Anfrage / Angebot

Rechnungsanschrift

Ansprechpartner:in

Teilnehmer:innnen

Kosten

Teilnehmer:in

 

€ 2,100

Kurs

Advanced Zynq UltraScale+ MPSoC for the Software Designer_OL

Gesamtbetrag

€ 2,100

*Pflichtfeld

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How can we help?

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FAQ

01. In which countries is PLC2 an Authorized Training Provider (ATP) of AMD?

PLC2 is an ATP in Cyprus, Czech Republic, Germany, Greece, Hungary, Poland, Slovakia, Slovenia, Switzerland, and Turkey.

02. What does AMD ATP stand for?

AMD Authorized Training Providers (ATPs) are expert instructors specializing in all aspects of FPGA and embedded design from software to systems and beyond. Courses offered leverage training materials specifically developed by AMD engineers and enhanced further via the specialized knowledge and expertise of AMD ATP instructors.

03. Can the training content be customized to specific FPGA and embedded design project requirements?

Yes. On request, we create customized training courses that are precisely tailored to your company’s tools, processes, and methods. See also our In-House training format.

04. Are there hands-on exercises in PLC2 training courses?

Depending on the course format, hands-on exercises are included in most of the training sessions, especially in workshops, power workshops, and online live courses.

05. How can I register for a PLC2 training course?

Go to the page of your desired training course and click the button »Book workshop«. You will jump directly to the booking form. Fill out the form and click submit. You will receive a confirmation e-mail immediately.

06. Can you help me with booking a room for the duration of my PLC2 training?

If you need a room for a face-to-face course, please contact us. We will support you in choosing suitable accommodation.

07. What times in the day do PLC2 training courses start and end?

Our face-to-face and online courses start daily at 9 a.m. (CET/CEST) and end at 5 p.m., with two coffee breaks and an extended lunch break. The total course time per day is 6 hours.

08. Are course materials provided in a PLC2 training?

All participants of paid courses will receive English training materials in electronic or paper form.

09. Will I receive a certificate upon completion of the PLC2 training course?

Each participant of a paid PLC2 course will receive a signed certificate of attendance at the end of the course.

10. Can I pay PLC2 training with Training Credits (TCs)?

Of course, you can also pay for your training using your available TCs (Training Credits). We will then invoice AMD directly. If you do not have sufficient credit for the booked training, the difference can be paid for with an additional payment. The additional charge will be invoiced directly to you.

11. What are the options for payment for PLC2 training?

You can pay us via bank transfer or with TCs (Training Credits). Unfortunately, payment via debit, credit card, or PayPal is not possible.

12. What is the deadline for payment for PLC2 training?

Payment is due 14 days after the invoice date, without deduction. Please transfer the amount within that time.

13. What are the options for cancelling a PLC2 training?

You can cancel free of charge up to 14 days before the course starts. If you have to cancel at short notice due to illness or other reasons, you have the option of adding a substitute participant or of making up the course at a later date (within 6 months).

14. When will I receive a firm commitment as to whether the PLC2 training course will take place?

You will receive binding confirmation 7 days before the course begins as to whether it will go ahead.

15. What is the minimum number of participants for a PLC2 training?

We generally offer courses for 5 or more people. This means that if you would like to book a course at your location, either five people must register or you must pay for five participants, even if fewer people attend.

16. Can I book a PLC2 training course that is given in English?

If you need a course that is officially advertised as given in German to be given in English, please contact us. We will try to make that possible for you.

17. What language is the PLC2 training course in?

Our webinars and online courses are conducted in English. All our F2F training courses are generally conducted in German. Feel free to contact us if you need face-to-face training in English or online training in German.