Menu

Expert Zynq 7000 SoC | Online

Online Live


Power Workshop

The Power Workshop »Expert Zynq 7000 SoC« builds on the Power Workshop »Professional Zynq 7000 SoC«. This allows the attendees to deepen and extend their knowledge of Zynq™ 7000 SoC architecture.
This course discusses in particular the handling of the specific tools provided by Vivado™ and Vitis™. Additionally, several important peripheral components available as part of the processor system (PS) will be explained in more detail. Furthermore, the usage of the processor cores in Zynq™ 7000 devices is discussed in more depth. The configuration possibilities of a DMA constitute another major topic. During this five-day class, the contents are further reinforced by the means of various exercises. There are both embedded hardware issues in the Vivado™ tool flow, and embedded software deals with issues in which participants already should demonstrate knowledge.

Due to accompanying exercises, the course offers in-depth and practice-oriented training. Attendees of the online live training will perform the practical exercises in real time with instructor assistance.

Course language: English

Michael Schwarz at PLC2

Contact

Michael Schwarz l Head of Training

+49 7664 91313-15

michael.schwarz@plc2.de

Details

Applicable technologies

AMD Zynq™ 7000 SoC

Requirements

Basic knowledge of the programming languages VHDL, C and the Zynq™ 7000 SoC architecture

Duration

5 days

Fee (net per person)

€ 3,050

Inclusive

Training material

Agenda

01

Embedded systems development review

02

Zynq™ 7000 SoC processing system overview

03

Debugging using the ChipScope pro analyzer

04

JTAG to AXI master debug IP transactions

05

Block RAM memory controllers

06

External memory controllers for static memory

07

Memory controllers for dynamic RAM

08

AXI streaming interface

09

System data movement: low latency and high bandwidth

10

Advanced processor configurations

11

Software boot and PL configuration

12

HDL system simulation with an embedded processor

13

Advanced boot methodology and boot details

14

Advanced Cortex®-A9 processor services

15

Advanced DMA controller configuration on the Zynq™ 7000 SoC

16

High-speed peripheral configuration on the Zynq™ 7000 SoC

17

Low-speed peripherals on the Zynq™ 7000 SoC

18

Ethernet support using LwIP stack

Dates

Expert Zynq 7000 SoC | Online

OL

Online

all year on request

Book now

Booking

Company

Contact Person

Request / Offer

Billing Address

Billing Person

Participant(s)

Fee

Participant

 

€ 3,050

Course

Expert Zynq 7000 SoC_OL

Total fee

€ 3,050

*Required field

Unternehmen

Ansprechpartner:in

Anfrage / Angebot

Rechnungsanschrift

Ansprechpartner:in

Teilnehmer:innnen

Kosten

Teilnehmer:in

 

€ 3,050

Kurs

Expert Zynq 7000 SoC_OL

Gesamtbetrag

€ 3,050

*Pflichtfeld

This might also interest you...

CourseFormatCategoryLocationDurationDate

Professional Zynq 7000 SoC | Online

OL (Online Live)

Embedded Development

Online

5 days

all year on request

Info

Embedded Architecture Vivado Vitis Zynq SoC Boot Software C C++ AXI Configuration System Integration Debugging AXI

Professional Zynq 7000 SoC

PW (Power Workshop)

Embedded Development

5 days

all year on request

Info

Embedded Architecture Vivado Vitis Zynq SoC Boot Software C C++ AXI Configuration System Integration Debugging AXI

Professional Zynq UltraScale+ MPSoC | Online

OL (Online Live)

Embedded Development

Online

5 days

Jun 22, 2026

Info

Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis

Professional Zynq UltraScale+ MPSoC | Online

OL (Online Live)

Embedded Development

Online

5 days

Sep 07, 2026

Info

Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis

Professional Zynq UltraScale+ MPSoC | Online

OL (Online Live)

Embedded Development

Online

5 days

Dec 07, 2026

Info

Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis

Professional Zynq UltraScale+ MPSoC

PW (Power Workshop)

Embedded Development

Frankfurt / Main

5 days

Jun 22, 2026

Info

Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis

Professional Zynq UltraScale+ MPSoC

PW (Power Workshop)

Embedded Development

Freiburg

5 days

Sep 07, 2026

Info

Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis

Professional Zynq UltraScale+ MPSoC

PW (Power Workshop)

Embedded Development

Frankfurt / Main

5 days

Dec 07, 2026

Info

Embedded Architecture Vivado Vitis MPSoC Cortex-A53 Cortex-R5 Processor Cache Coherency Hypervisor PetaLinux Protection PCIe PS PMU Power IP-Integrator AXI ACE Vitis

Professional VHDL | Online

OL (Online Live)

Programming Languages

Online

5 days

May 18, 2026

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL | Online

OL (Online Live)

Programming Languages

Online

5 days

Jul 20, 2026

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL | Online

OL (Online Live)

Programming Languages

Online

5 days

Oct 12, 2026

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL | Online

OL (Online Live)

Programming Languages

Online

5 days

Dec 07, 2026

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL

PW (Power Workshop)

Programming Languages

Freiburg

5 days

May 18, 2026

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL

PW (Power Workshop)

Programming Languages

Freiburg

5 days

Jul 20, 2026

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL

PW (Power Workshop)

Programming Languages

Stuttgart

5 days

Oct 12, 2026

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL

PW (Power Workshop)

Programming Languages

Freiburg

5 days

Dec 07, 2026

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Compact Embedded Linux | Online

OL (Online Live)

Embedded Development

Online

3 days

all year on request

Info

Embedded PetaLinux Vitis Linux OS Operating System Open Source OSS Driver Application Library Software Kernel Debugging Performance Boot Bootflow elf c c++ c/c++ Device Tree Devicetree Device-Tree Yocto tool flow Zynq SoC

Compact Embedded Linux

WO (Workshop)

Embedded Development

3 days

all year on request

Info

Embedded PetaLinux Vitis Linux OS Operating System Open Source OSS Driver Application Library Software Kernel Debugging Performance Boot Bootflow elf c c++ c/c++ Device Tree Devicetree Device-Tree Yocto tool flow Zynq SoC

showing: 1 to 2 (2)

How can we help?

Contact

FAQ

01. In which countries is PLC2 an Authorized Training Provider (ATP) of AMD?

PLC2 is an ATP in Cyprus, Czech Republic, Germany, Greece, Hungary, Poland, Slovakia, Slovenia, Switzerland, and Turkey.

02. What does AMD ATP stand for?

AMD Authorized Training Providers (ATPs) are expert instructors specializing in all aspects of FPGA and embedded design from software to systems and beyond. Courses offered leverage training materials specifically developed by AMD engineers and enhanced further via the specialized knowledge and expertise of AMD ATP instructors.

03. Can the training content be customized to specific FPGA and embedded design project requirements?

Yes. On request, we create customized training courses that are precisely tailored to your company’s tools, processes, and methods. See also our In-House training format.

04. Are there hands-on exercises in PLC2 training courses?

Depending on the course format, hands-on exercises are included in most of the training sessions, especially in workshops, power workshops, and online live courses.

05. How can I register for a PLC2 training course?

Go to the page of your desired training course and click the button »Book workshop«. You will jump directly to the booking form. Fill out the form and click submit. You will receive a confirmation e-mail immediately.

06. Can you help me with booking a room for the duration of my PLC2 training?

If you need a room for a face-to-face course, please contact us. We will support you in choosing suitable accommodation.

07. What times in the day do PLC2 training courses start and end?

Our face-to-face and online courses start daily at 9 a.m. (CET/CEST) and end at 5 p.m., with two coffee breaks and an extended lunch break. The total course time per day is 6 hours.

08. Are course materials provided in a PLC2 training?

All participants of paid courses will receive English training materials in electronic or paper form.

09. Will I receive a certificate upon completion of the PLC2 training course?

Each participant of a paid PLC2 course will receive a signed certificate of attendance at the end of the course.

10. Can I pay PLC2 training with Training Credits (TCs)?

Of course, you can also pay for your training using your available TCs (Training Credits). We will then invoice AMD directly. If you do not have sufficient credit for the booked training, the difference can be paid for with an additional payment. The additional charge will be invoiced directly to you.

11. What are the options for payment for PLC2 training?

You can pay us via bank transfer or with TCs (Training Credits). Unfortunately, payment via debit, credit card, or PayPal is not possible.

12. What is the deadline for payment for PLC2 training?

Payment is due 14 days after the invoice date, without deduction. Please transfer the amount within that time.

13. What are the options for cancelling a PLC2 training?

You can cancel free of charge up to 14 days before the course starts. If you have to cancel at short notice due to illness or other reasons, you have the option of adding a substitute participant or of making up the course at a later date (within 6 months).

14. When will I receive a firm commitment as to whether the PLC2 training course will take place?

You will receive binding confirmation 7 days before the course begins as to whether it will go ahead.

15. What is the minimum number of participants for a PLC2 training?

We generally offer courses for 5 or more people. This means that if you would like to book a course at your location, either five people must register or you must pay for five participants, even if fewer people attend.

16. Can I book a PLC2 training course that is given in English?

If you need a course that is officially advertised as given in German to be given in English, please contact us. We will try to make that possible for you.

17. What language is the PLC2 training course in?

Our webinars and online courses are conducted in English. All our F2F training courses are generally conducted in German. Feel free to contact us if you need face-to-face training in English or online training in German.