Embedded Designer (Long Term)

Training Dates April

Apr 03—04, 2025
Apr 15—16, 2025
May 08—09, 2025
May 15—16, 2025
May 22—23, 2025
June 02—03, 2025
June 17—18, 2025
June 25—26, 2025

Training Dates October

Oct 01—02, 2025
Oct 16—17, 2025
Oct 27—28, 2025
Nov 05—06, 2025
Nov 17—18, 2025
Nov 24—25, 2025
Dec 01—02, 2025
Dec 10—11, 2025

Session 1: AMD embedded design flow

• Understanding of a methodical embedded development – the AMD UltraFast™ methodology
• An introduction for software designers to programmable logic architecture (FPGA)
• Management of hardware design with Arm® and AMD processors in Vivado™ tool suite
• Design entry with IP integrator (IPI) of processors, memory, and peripherals
• Control of hardware implementation, run, and constraints management in Vivado™
• Understanding of report analysis: flow, timing closure, utilization, power consumption
• Vitis™ design - Eclipse-based AMD software project management and embedded software design flow
• The methodology of migration of IPs in Vivado™ and user IP version management
• Design maintenance of software projects in case of hardware changes with AMD Vitis™
• The methodology of migration of Eclipse/SDK projects to Vitis™
• Application of hardware based JTAG debugging with Vitis™ wizard
• Introduction to boot loading, creating, and running boot images
• The complete embedded design flow on a reference example design
• The AMD TCL consoles for Vivado™ and Vitis™ projects

Session 2: Processors, SoC, and MPSoC architectures

• Introduction to MPSoC architectures
• Introduction to the AMD Zynq™ UltraScale+™ MPSoC architecture
• Comparisons with Zynq™ SoC architectures
• Overview of Arm® processor architectures APU/RPU/PMU
• Application type processor APU - Cortex®™-A53
• Arm® realtime type processor RPU - Cortex®-R5
• Neon™ engines for SIMD technology and floating point support
• 32 bit and/or 64 bit processing with Cortex®-A53
• AMD MicroBlaze™ processor architecture
• Compare AMD MicroBlaze™ vs. Arm® MPU Cortex®-M1/M3
• Interrupt management and interrupt controller
• Porting and migration in case of processor change
• Bootloader creation and boot image generation
• Coherence and cache management in software and hardware
• Safety and isolation of accesses with Sharing Memory and Sharing Peripherals
• Secure management and Arm® TrustZone®
• Power islands in Zynq™ UltraScale+™ MPSoC

Session 3 AXI based IP development

• AMBA® bus standards: APB, AHP, AXI3, AXI4
• AXI-based connectivity
• AXI variants and timing diagrams
• AXI PS/PL port types and configurations
• Coherence management and AXI interconnects: ACP, ACE, and HPC types
• Creation of embedded user peripherals with AXI interface
• IP validation: BFM simulation, system simulation, and hardware testing
• VIP: AMD Verification IP for simulation of AXI peripherals
• Unit tests with AXI traffic generator and AXI performance monitor IPs
• Optimization of data throughput and latency as well as analysis
• Integration of DMA and data mover IPs for data packet transfers
• Architecture of multiport accesses at the DDRAM controller
• QoS: arbitration, prioritization of port accesses to DDRAM memory
• AXI-based system performance modeling
• Integration of an accelerator IP from Vivado™ HLS

Session 4: Embedded software design

• Vitis™ - OS and domain management
• The BareMetal-based operating system
• Application development with Vitis™
• Application Programming Interfaces (API) of the AMD libraries
• Timer programming, timer in PS and PL
• Software driver and driver layers in Vitis™
• AMD software stacks in Vitis™
• Interrupt management and creation of interrupt handlers
• The creation of a software driver and integration into the BSP
• An overview of power management and platform management
• Overview and selection criteria of embedded operating systems
• Introduction to boot mechanisms

Session 5: Validation methodologies

• Debugging, simulation, and emulation
• An introduction to the Arm® CoreSight™ architecture
• Debug Flow in Vitis™ with GDB
• Debug Flow in Vitis™ with System Debugger (à Intel System Debugger?)
• Console-based debugging (xsct/xsdb/hsi)
• Debugging an interrupt handler application
• An introduction to QEMU emulation
• Co-debugging of hardware and software
• Single-Processor and Multi-Processor debugging
• QEMU Co-Simulation: Emulation plus HDL simulation of the PL architecture
• Cross-Triggering: CPU cores and PL integrated logic analysis
• MicroBlaze™ system simulation
• Testing with JTAG based measurement, memory dump, and injection
• FSBL creation, analysis, and FSBL debugging

Session 6: Embedded systems integration

• SMP and AMP support
• The components of a Linux operating system
• Application development with PetaLinux
• The FreeRTOS™ based operating system
• The OpenAMP framework for message inter-communication
• Introduction to platform management and PMU controller
• IPI Protocol of the platform manager (PMU)
• Platform boot and power management
• Platform management unit in Zynq™ UltraScale+™ MPSoC
• Describe the power islands
• Managing power for other processors
• Power management and use of the PMU firmware library
• Extending the PMU firmware with user tasks
• Non-secure and secure boot management
• FSBL customization and debugging
• The scenario and analysis of a failed Linux boot

Session 7: PetaLinux tools and development

• An introduction to AMD PetaLinux
• Application development for Linux OS
• The configuration of an OS Linux for the APU system
• Configuration of Linux kernel and Linux file system
• The PetaLinux build flow
• Creating a user peripheral with software drivers
• The Linux-based operating system
• Networking and TCP-IP
• Userspace I/O and loadable kernel modules
• Linux device drivers overview
• PetaLinux image booting methods
• Configuration of the rootfs file system
• Custom driver development for custom IPs
• Overview of Yocto builds and Yocto in PetaLinux
• An overview of Yocto builds and comparison with PetaLinux flow

Session 8: Linux drivers

• An introduction Linux basics for driver development
• Driver support from uBoot
• Device tree overlay management
• Fundamental basics of Linux driver modules
• Character driver - the preferred module for user peripheral drivers
• Driver for Embedded Linux with the UIO framework
• Platform driver and device tree management (DTS/DTB)
• Linux driver API for timers, threads, work queues, and more
• Control mechanisms and debugging of a Linux driver
• Linux interrupt mechanisms