Advanced Vivado | Online
The AMD Vivado™ design suite tool provides many features which offer valuable features for the experienced hardware designer. Extended tool features are needed for a higher productivity in the development process: the Quality of Results (QoR) of the implementation flow often needs to be improved, a hardware debugging run-time flow is often getting critical and experienced designers should know alternative approaches of the hardware development with this complex tool suite. The IP management provides new features like container with parameterization through the hierarchy. Managing the version control with source and project management requires TCL-based scripting. The hardware debug flow supports many options like source and/or netlist integration or even patching the probes in the place-and-route build. Hierarchical design flow, incremental design flow, ML-based analysis and auto-assigned suggestions with intelligent design runs are examples of advanced Vivado™ tool capabilities.
This workshop is recommended for the experienced hardware designer who would like to improve his methodologies when working with the Vivado™ design suite tool.
Due to accompanying exercises, the course offers in-depth and practice-oriented training. Attendees of the online live training will perform the practical exercises in real time with instructor assistance.
Course language: English

Contact
Michael Schwarz l Head of Training
+49 7664 91313-15
Details
Applicable technologies
AMD FPGAs and adaptive SoCsRequirements
Fundamental knowledge of the Vivado™ design suite toolWorking experience with VHDL or Verilog
Duration
3 daysFee (net per person)
€ 2,100Inclusive
Training materialAgenda
01
IP management, flows and integration
02
Scripting and revision control
03
Incremental compile flows
04
Improve the timing results
05
Hierarchical design
06
Design analysis and floorplanning
07
QoR and intelligent runs
08
Various debug flows
09
ILA triggering and using state machines
10
Power management techniques
Dates
Advanced Vivado | Online
OL
Online
Apr 15, 2026
Advanced Vivado | Online
OL
Online
Jul 06, 2026
Advanced Vivado | Online
OL
Online
Oct 14, 2026
Available formats for this training
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FAQ
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PLC2 is an ATP in Cyprus, Czech Republic, Germany, Greece, Hungary, Poland, Slovakia, Slovenia, Switzerland, and Turkey.
02. What does AMD ATP stand for?
AMD Authorized Training Providers (ATPs) are expert instructors specializing in all aspects of FPGA and embedded design from software to systems and beyond. Courses offered leverage training materials specifically developed by AMD engineers and enhanced further via the specialized knowledge and expertise of AMD ATP instructors.
03. Can the training content be customized to specific FPGA and embedded design project requirements?
Yes. On request, we create customized training courses that are precisely tailored to your company’s tools, processes, and methods. See also our In-House training format.
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Depending on the course format, hands-on exercises are included in most of the training sessions, especially in workshops, power workshops, and online live courses.
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