Compact VHDL for Synthesis | Online
Programmable logic devices like FPGAs have been established in daily life. They can be found in mobile phones, IoT devices, cars, or cloud data centers. Their area of operation is as broad as their size. FPGAs are used as, but are not limited to: protocol adapters, signal converters, or accelerators for video, radar, and sensor data processing. The design of digital circuits on this scale needs a powerful hardware description language which offers different levels of abstraction, so an engineer can create a digital hardware design in a quick and effective way. VHDL fulfills these requirements.
VHDL is a strongly typed hardware description language that prohibits typical programming mistakes in the coding phase. Usually, VHDL is used on the Register Transfer Level (RTL) to design digital circuits of any complexity. Apart from the language constructs for synthesis, VHDL offers a wide range of functionality to describe complex verification models. Thus, it is possible to verify digital designs from simple gate-up to complicated System on Chip (SoC) before going to lab tests. This workshop will teach the synthesis of relevant aspects of the VHDL hardware description language based on the IEEE Std. 1076-2008 language revision.
Basic knowledge of digital circuit design (gates, multiplexers, flip flops, memories), as well as the understanding of basic principles of scripting or programming languages are welcome.
Due to accompanying exercises, the course offers in-depth and practice-oriented training. Attendees of the online live training will perform the practical exercises in real time with instructor assistance.
Course language: English
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Contact
Michael Schwarz l Head of Training
+49 7664 91313-15
Details
Applicable technologies
Independent of FPGA technologiesRequirements
Basic knowledge of digital circuit designDuration
3 daysFee (net per person)
€ 2,100Inclusive
Training materialAgenda
01
Introduction to VHDL
Language concept
Hardware modelling techniques
Design flow
02
Hardware description with VHDL
Entity/architecture
Configuration
Package
Library/context
03
Language constructs
Signals, variables, constants
Processes und concurrency
Control structures
Functions/procedures
Generic design descriptions
04
Strong typing in VHDL
Predefined types
User defined types
Predefined operators
Attributes
Fixed point package
05
Description techniques
Finite state machines
Memory
06
Test bench concept
Simple testbenches
Assertions
Dates
Compact VHDL for Synthesis | Online
OL
Online
Jun 15, 2026
Compact VHDL for Synthesis | Online
OL
Online
Sep 21, 2026
Compact VHDL for Synthesis | Online
OL
Online
Nov 23, 2026
Available formats for this training
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FAQ
01. In which countries is PLC2 an Authorized Training Provider (ATP) of AMD?
PLC2 is an ATP in Cyprus, Czech Republic, Germany, Greece, Hungary, Poland, Slovakia, Slovenia, Switzerland, and Turkey.
02. What does AMD ATP stand for?
AMD Authorized Training Providers (ATPs) are expert instructors specializing in all aspects of FPGA and embedded design from software to systems and beyond. Courses offered leverage training materials specifically developed by AMD engineers and enhanced further via the specialized knowledge and expertise of AMD ATP instructors.
03. Can the training content be customized to specific FPGA and embedded design project requirements?
Yes. On request, we create customized training courses that are precisely tailored to your company’s tools, processes, and methods. See also our In-House training format.
04. Are there hands-on exercises in PLC2 training courses?
Depending on the course format, hands-on exercises are included in most of the training sessions, especially in workshops, power workshops, and online live courses.
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Go to the page of your desired training course and click the button »Book workshop«. You will jump directly to the booking form. Fill out the form and click submit. You will receive a confirmation e-mail immediately.
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If you need a room for a face-to-face course, please contact us. We will support you in choosing suitable accommodation.
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Our face-to-face and online courses start daily at 9 a.m. (CET/CEST) and end at 5 p.m., with two coffee breaks and an extended lunch break. The total course time per day is 6 hours.
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All participants of paid courses will receive English training materials in electronic or paper form.
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Each participant of a paid PLC2 course will receive a signed certificate of attendance at the end of the course.
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You will receive binding confirmation 7 days before the course begins as to whether it will go ahead.
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We generally offer courses for 5 or more people. This means that if you would like to book a course at your location, either five people must register or you must pay for five participants, even if fewer people attend.
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Our webinars and online courses are conducted in English. All our F2F training courses are generally conducted in German. Feel free to contact us if you need face-to-face training in English or online training in German.