Menu

Compact Zynq 7000 SoC for the Software Designer

Workshop


Online Live

This workshop introduces you to software design and development for the AMD Zynq™ SoC using the AMD Vitis™ unified development platform. You will learn the concepts, tools, and techniques required for the software phase of the design cycle. Topics are comprehensive, covering the design and implementation of the Board Support Package (BSP) for resource access and management of the AMD standalone library. Major topics include device driver use, user application debugging, and integration.

Practical implementation tips and best practices are also provided throughout to enable you to make good design decisions and keep your design cycles to a minimum.

Due to accompanying exercises, the course offers in-depth and practice-oriented training.

Course language: German (English possible on request)

Portrait von Michael Schwarz

Contact

Michael Schwarz

+49 7664 91313-15

michael.schwarz@plc2.de

Details

Applicable technologies

AMD Zynq™ 7000 SoCs

Requirements

Conceptual understanding of embedded processing systems, writing and modifying scripts for user applications, compiler settings and bootloader operation.
Comfort with the C/C++ programming language

Duration

3 days

Fee (net per person)

€ 2,300

Inclusive

Training material
Plus beverages during breaks
Lunch

Agenda

01

Overview of embedded software development

02

Embedded UltraFast™ design methodology

03

Zynq™ 7000 SoC architecture overview

04

Driving the Vitis™ software development tool

05

System debugger

06

Standalone software platform development

07

Linker script management

08

Migrating from SDK to the Vitis™ platform

09

Software interrupts: writing interrupt handlers

10

Operating systems overview

11

Linux: a high-level introduction

12

Linux software application development

13

Booting overview

14

Software profiling

15

Understanding device drivers

16

Custom device drivers

Dates

Compact Zynq 7000 SoC for the Software Designer

WO

all year on request

Book now

Booking

DE EN

Company

Contact Person

Request / Offer

Billing Address

Billing Person

Participant(s)

Fee

Participant

 

€ 2,300

Course

Compact Zynq 7000 SoC for the Software Designer_WO

Total fee

€ 2,300

*Required field

Unternehmen

Ansprechpartner:in

Anfrage / Angebot

Rechnungsanschrift

Ansprechpartner:in

Teilnehmer:innnen

Kosten

Teilnehmer:in

 

€ 2,300

Kurs

Compact Zynq 7000 SoC for the Software Designer_WO

Gesamtbetrag

€ 2,300

*Pflichtfeld

This might also interest you...

Course Format Category Location Duration Date

Professional Zynq 7000 SoC

OL (Online Live)

Embedded for AMD (Adaptive) SoCs & MPSoCs

5 days

all year on request

Info

Embedded Architecture Vivado Vitis Zynq SoC Boot Software C C++ AXI Configuration System Integration Debugging AXI

Professional Zynq 7000 SoC

PW (Power Workshop)

Embedded for AMD (Adaptive) SoCs & MPSoCs

5 days

all year on request

Info

Embedded Architecture Vivado Vitis Zynq SoC Boot Software C C++ AXI Configuration System Integration Debugging AXI

Compact Zynq 7000 SoC for the Hardware Designer

OL (Online Live)

Embedded for AMD (Adaptive) SoCs & MPSoCs

3 days

all year on request

Info

Embedded Architecture Vivado Vitis Zynq SoC Platform Hardware C AXI

Compact Zynq 7000 SoC for the Hardware Designer

WO (Workshop)

Embedded for AMD (Adaptive) SoCs & MPSoCs

3 days

all year on request

Info

Embedded Architecture Vivado Vitis Zynq SoC Platform Hardware C AXI

Expert Zynq 7000 SoC

OL (Online Live)

Embedded for AMD (Adaptive) SoCs & MPSoCs

5 days

all year on request

Info

Embedded Architecture Vivado Vitis SoC Cortex-A9 Processor Cache PetaLinux IP-Integrator Linux PS AXI

Expert Zynq 7000 SoC

PW (Power Workshop)

Embedded for AMD (Adaptive) SoCs & MPSoCs

5 days

all year on request

Info

Embedded Architecture Vivado Vitis SoC Cortex-A9 Processor Cache PetaLinux IP-Integrator Linux PS AXI

Professional VHDL

OL (Online Live)

Programming Languages

Online

5 days

Feb 24, 2025

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL

OL (Online Live)

Programming Languages

Online

5 days

May 05, 2025

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL

OL (Online Live)

Programming Languages

Online

5 days

Jul 21, 2025

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL

OL (Online Live)

Programming Languages

Online

5 days

Oct 06, 2025

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL

OL (Online Live)

Programming Languages

Online

5 days

Dec 15, 2025

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL

PW (Power Workshop)

Programming Languages

Freiburg

5 days

Feb 24, 2025

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL

PW (Power Workshop)

Programming Languages

Munich

5 days

May 05, 2025

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL

PW (Power Workshop)

Programming Languages

Freiburg

5 days

Jul 21, 2025

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL

PW (Power Workshop)

Programming Languages

Frankfurt / Main

5 days

Oct 06, 2025

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

Professional VHDL

PW (Power Workshop)

Programming Languages

Freiburg

5 days

Dec 15, 2025

Info

FPGA HDL VHDL Synthesis Language Verification Hardware FPGA Programmable Logic Simulation Implementierung Synthese Bitstream bit Vivado Vitis

showing: 1 to 2 (2)

How can we help?

Contact

FAQ

01. Can you help me with reserving the room?

If you need a room for a face-to-face course, please contact us. We will support you in choosing suitable accommodation.

02. What times in the day do courses start and end?

Our face-to-face and online courses start daily at 9 a.m. (CET/CEST) and end at 5 p.m., with two coffee breaks and an extended lunch break. The total course time per day is 6 hours.

03. Are course materials provided?

All participants of paid courses will receive English training materials in electronic or paper form.

04. Will I receive a course certificate?

Each participant of a paid PLC2 course will receive a signed certificate of attendance at the end of the course.

05. Can I pay with Training Credits (TCs)?

Of course, you can also pay for your training using your available TCs (Training Credits). We will then invoice AMD directly. If you do not have sufficient credit for the booked training, the difference can be paid for with an additional payment. The additional charge will be invoiced directly to you.

06. What are the options for payment?

You can pay us via bank transfer or with TCs (Training Credits). Unfortunately, payment via debit, credit card, or PayPal is not possible.

07. What is the deadline for payment?

Payment is due 14 days after the invoice date, without deduction. Please transfer the amount within that time.

08. What are the options for cancelling?

You can cancel free of charge up to 14 days before the course starts. If you have to cancel at short notice due to illness or other reasons, you have the option of adding a substitute participant or of making up the course at a later date (within 6 months).

09. When will I receive a firm commitment as to whether the course will take place?

You will receive binding confirmation 7 days before the course begins as to whether it will go ahead.

10. How many participants are required for a course to be given/what is the minimum number of participants?

We generally offer courses for 5 or more people. That means that if you would like to book a course at your premises, you need 5 people to register or need to pay the amount for 5 participants, even if fewer people attend.

11. Can I book a course that is given in English?

If you need a course that is officially advertised as given in German to be given in English, please contact us. We will try to make that possible for you.

12. What language is the course in?

Our webinars and online courses are conducted in English. All our F2F training courses are generally conducted in German. Feel free to contact us if you need face-to-face training in English or online training in German.