Accelerating Neural Network Inference with Vitis AI

PLC2 is an ATP in Cyprus, Czech Republic, Germany, Greece, Hungary, Poland, Slovakia, Slovenia, Switzerland, and Turkey.

AMD Authorized Training Providers (ATPs) are expert instructors specializing in all aspects of FPGA and embedded design from software to systems and beyond. Courses offered leverage training materials specifically developed by AMD engineers and enhanced further via the specialized knowledge and expertise of AMD ATP instructors.

Yes. On request, we create customized training courses that are precisely tailored to your company’s tools, processes, and methods. See also our In-House training format.

Depending on the course format, hands-on exercises are included in most of the training sessions, especially in workshops, power workshops, and online live courses.

Go to the page of your desired training course and click the button »Book workshop«. You will jump directly to the booking form. Fill out the form and click submit. You will receive a confirmation e-mail immediately.

If you need a room for a face-to-face course, please contact us. We will support you in choosing suitable accommodation.

Our face-to-face and online courses start daily at 9 a.m. (CET/CEST) and end at 5 p.m., with two coffee breaks and an extended lunch break. The total course time per day is 6 hours.

All participants of paid courses will receive English training materials in electronic or paper form.

Each participant of a paid PLC2 course will receive a signed certificate of attendance at the end of the course.

Of course, you can also pay for your training using your available TCs (Training Credits). We will then invoice AMD directly. If you do not have sufficient credit for the booked training, the difference can be paid for with an additional payment. The additional charge will be invoiced directly to you.

You can pay us via bank transfer or with TCs (Training Credits). Unfortunately, payment via debit, credit card, or PayPal is not possible.

Payment is due 14 days after the invoice date, without deduction. Please transfer the amount within that time.

You can cancel free of charge up to 14 days before the course starts. If you have to cancel at short notice due to illness or other reasons, you have the option of adding a substitute participant or of making up the course at a later date (within 6 months).

You will receive binding confirmation 7 days before the course begins as to whether it will go ahead.

We generally offer courses for 5 or more people. This means that if you would like to book a course at your location, either five people must register or you must pay for five participants, even if fewer people attend.

If you need a course that is officially advertised as given in German to be given in English, please contact us. We will try to make that possible for you.

Our webinars and online courses are conducted in English. All our F2F training courses are generally conducted in German. Feel free to contact us if you need face-to-face training in English or online training in German.

All PLC2 trainings are available in multiple formats (e.g. F2F, online or in-house) to fit different learning preferences and project constraints.

Basic knowledge of digital logic and hardware description languages (VHDL / Verilog) is recommended but not mandatory. Many training courses show how to combine tools and methodologies in a targeted manner.

The training courses teach established engineering methodologies such as:
• Defining proper timing constraints
• FPGA design techniques
• Vitis HLS
• Test-driven development (TDD) for HDL
• Coverage-oriented verification
• Automated regression testing
• Workflow standardization (GitFlow, branching models)
• CI/CD best practices

Depending on the course, we cover common tools and methodologies, including:
• FPGA design techniques, timing constraints
• EDA toolchains (e.g., Vivado, Vitis, Vitis HLS)
• Version control (Git, GitLab, GitHub)
• CI/CD systems (GitLab CI)
• Debugging and analysis tools
• Simulation and verification environments (OSVVM)
and other high-quality workflows for improving development quality.

Our Tools & Methodology training category focuses on the professional use of development, verification, and automation tools combined with proven engineering methodologies. The courses address how to structure FPGA and SoC projects efficiently, how to use tools correctly and reproducibly, and how to integrate best practices such as version control, CI/CD, verification frameworks, and timing-closure workflows into real-world projects. In addition, FPGA design techniques is an important topic which provides the technique to design reliable FPGA designs.