The PoC-Library:
Extending the AXI4Lite Library
Webinar
In the 5th webinar of our PoC-Library webinar series, we are going to present more of our AXI4-Lite infrastructure component release on GitHub and we are going
to build higher level components on top of existing PoC components.
For example, PoC's UART component will be merged with an AXI4-Lite register interface into "axi4lite_UART" offering a register-level equivalent implementation to AMD's AXI Uartlite IP core. This allows for a 1-to-1 replacement while reusing the existing PetaLinux driver. Moreover, PoC's UART supports hardware and software flow control (xon/xoff), which is missing in the Uartlite implementation.
The AXI4-Lite components will be extended by an AXI4-Lite UART, an AXI4-Lite to OCRAM adapter, a HighResolutionClock and an AXI4-Lite to DRP adapter.
Watch part 1:
The PoC-Library - Open-Source VHDL Component Library »Pile of Cores«
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Contact
Michael Schwarz l Head of Training
+49 7664 91313-15
Details
Duration
1 hourDates
Available formats for this training
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