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PLC2 training category on DSP image processing PLC2 training category on DSP image processing

DSP & Image Processing

With their inherent flexibility, AMD FPGAs and SoCs are ideal for high-performance or multi-channel digital signal processing (DSP) applications that can take advantage of hardware parallelism. AMD FPGAs and SoCs combine this processing bandwidth with comprehensive solutions, including easy-to-use design tools for hardware designers, software developers, and system architects. We at PLC2 will teach you how to get the maximum out of these FPGAs and SoCs using Vitis Model Composer in interaction with Matlab Simulink. Additionally, you will learn how to develop HDL-based DSP functions.

Upcoming Trainings

CourseFormatCategoryLocationDurationDate

Compact Vitis HLS

WO (Workshop)

DSP & Image Processing

Munich

3 days

May 20, 2026

Info

Design Entry Vitis HLS Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library High Level Synthesis c/c++ Co-Simulation IP AXI interface

Compact Vitis HLS

WO (Workshop)

DSP & Image Processing

Freiburg

3 days

Aug 10, 2026

Info

Design Entry Vitis HLS Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library High Level Synthesis c/c++ Co-Simulation IP AXI interface

Compact Vitis HLS

WO (Workshop)

DSP & Image Processing

Stuttgart

3 days

Nov 18, 2026

Info

Design Entry Vitis HLS Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library High Level Synthesis c/c++ Co-Simulation IP AXI interface

Compact Vitis HLS | Online

OL (Online Live)

DSP & Image Processing

Online

3 days

May 20, 2026

Info

Design Entry Vitis HLS Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library High Level Synthesis c/c++ Co-Simulation IP AXI interface

Compact Vitis HLS | Online

OL (Online Live)

DSP & Image Processing

Online

3 days

Aug 10, 2026

Info

Design Entry Vitis HLS Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library High Level Synthesis c/c++ Co-Simulation IP AXI interface

Compact Vitis HLS | Online

OL (Online Live)

DSP & Image Processing

Online

3 days

Nov 18, 2026

Info

Design Entry Vitis HLS Software Tool Flow Blockdiagram SoC MPSoC Versal ACAP C C++ BSP Driver Board Support Package Profile Profiling Debugger System Debugger GCC GNU Eclipse Library High Level Synthesis c/c++ Co-Simulation IP AXI interface

Professional DSP Design Using Vitis Model Composer

PW (Power Workshop)

DSP & Image Processing

Frankfurt / Main

5 days

Jun 22, 2026

Info

DSP Mathworks Matlab Tool Flow Simulink Filter FPGA Sampling Streaming System Generator Toolbox

Professional DSP Design Using Vitis Model Composer

PW (Power Workshop)

DSP & Image Processing

Freiburg

5 days

Sep 21, 2026

Info

DSP Mathworks Matlab Tool Flow Simulink Filter FPGA Sampling Streaming System Generator Toolbox

Professional DSP Design Using Vitis Model Composer

PW (Power Workshop)

DSP & Image Processing

Berlin

5 days

Dec 14, 2026

Info

DSP Mathworks Matlab Tool Flow Simulink Filter FPGA Sampling Streaming System Generator Toolbox

Professional DSP Design Using Vitis Model Composer | Online

OL (Online Live)

DSP & Image Processing

Online

5 days

Jun 22, 2026

Info

DSP Mathworks Matlab Tool Flow Simulink Filter FPGA Sampling Streaming System Generator Toolbox

Professional DSP Design Using Vitis Model Composer | Online

OL (Online Live)

DSP & Image Processing

Online

5 days

Sep 21, 2026

Info

DSP Mathworks Matlab Tool Flow Simulink Filter FPGA Sampling Streaming System Generator Toolbox

Professional DSP Design Using Vitis Model Composer | Online

OL (Online Live)

DSP & Image Processing

Online

5 days

Dec 14, 2026

Info

DSP Mathworks Matlab Tool Flow Simulink Filter FPGA Sampling Streaming System Generator Toolbox

Compact DSP Design for Versal Using Vitis Model Composer

WO (Workshop)

DSP & Image Processing

3 days

all year on request

Info

DSP Mathworks Matlab Tool Flow FPGA

Compact DSP Design for Versal Using Vitis Model Composer | Online

OL (Online Live)

DSP & Image Processing

Online

3 days

all year on request

Info

DSP Mathworks Matlab Tool Flow FPGA

Compact DSP Design for FPGAs Using Vitis Model Composer

WO (Workshop)

DSP & Image Processing

Frankfurt / Main

3 days

Jun 22, 2026

Info

DSP Mathworks Matlab Tool Flow FPGA

Compact DSP Design for FPGAs Using Vitis Model Composer

WO (Workshop)

DSP & Image Processing

Freiburg

3 days

Sep 21, 2026

Info

DSP Mathworks Matlab Tool Flow FPGA

Compact DSP Design for FPGAs Using Vitis Model Composer

WO (Workshop)

DSP & Image Processing

Berlin

3 days

Dec 14, 2026

Info

DSP Mathworks Matlab Tool Flow FPGA

Compact DSP Design for FPGAs Using Vitis Model Composer | Online

OL (Online Live)

DSP & Image Processing

Online

3 days

Jun 22, 2026

Info

DSP Mathworks Matlab Tool Flow FPGA

Compact DSP Design for FPGAs Using Vitis Model Composer | Online

OL (Online Live)

DSP & Image Processing

Online

3 days

Sep 21, 2026

Info

DSP Mathworks Matlab Tool Flow FPGA

Compact DSP Design for FPGAs Using Vitis Model Composer | Online

OL (Online Live)

DSP & Image Processing

Online

3 days

Dec 14, 2026

Info

DSP Mathworks Matlab Tool Flow FPGA

From Modelling to Inference: Preparing and Accelerating Neural Networks on AMD Adaptive SoCs

WE (Webinar)

DSP & Image Processing

Online

1 hour

on demand

Info

CNN Acceleration on AMD Adaptive SoCs

WE (Webinar)

DSP & Image Processing

Online

1 hour

on demand

Info

CNN Acceleration on AMD Adaptive SoCs

Accelerate Your DSP Compute Loads with Versal AI Engines

WE (Webinar)

DSP & Image Processing

Online

1 hour

on demand

Info

Fast Track Evaluation of ML Models on Versal Adaptive SoC

WE (Webinar)

DSP & Image Processing

Online

1 hour

on demand

Info


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How can we help?

Contact

FAQ

01. In which countries is PLC2 an AMD ATP?

PLC2 is an ATP in Cyprus, Czech Republic, Germany, Greece, Hungary, Poland, Slovakia, Slovenia, Switzerland, and Turkey.

02. What does AMD ATP stand for?

AMD Authorized Training Providers (ATPs) are expert instructors specializing in all aspects of FPGA and embedded design from software to systems and beyond. Courses offered leverage training materials specifically developed by AMD engineers and enhanced further via the specialized knowledge and expertise of AMD ATP instructors.

03. Can the training content be customized to specific FPGA and embedded design project requirements?

Yes. On request, we create customized training courses that are precisely tailored to your company’s tools, processes, and methods. See also our In-House training format.

04. Are there hands-on exercises in PLC2 trainings?

Depending on the course format, hands-on exercises are included in most of the trainings, especially in workshops, power workshops and online live sessions.

05. How can I register for a training course?

Go to the page of your desired training course and click the button »Book workshop«. You will jump directly to the booking form. Fill out the form and click submit. You will receive a confirmation e-mail immediately.

06. Can you help me with reserving the room?

If you need a room for a face-to-face course, please contact us. We will support you in choosing suitable accommodation.

07. What times in the day do courses start and end?

Our face-to-face and online courses start daily at 9 a.m. (CET/CEST) and end at 5 p.m., with two coffee breaks and an extended lunch break. The total course time per day is 6 hours.

08. Are course materials provided?

All participants of paid courses will receive English training materials in electronic or paper form.

09. Will I receive a course certificate?

Each participant of a paid PLC2 course will receive a signed certificate of attendance at the end of the course.

10. Can I pay with Training Credits (TCs)?

Of course, you can also pay for your training using your available TCs (Training Credits). We will then invoice AMD directly. If you do not have sufficient credit for the booked training, the difference can be paid for with an additional payment. The additional charge will be invoiced directly to you.

11. What are the options for payment?

You can pay us via bank transfer or with TCs (Training Credits). Unfortunately, payment via debit, credit card, or PayPal is not possible.

12. What is the deadline for payment?

Payment is due 14 days after the invoice date, without deduction. Please transfer the amount within that time.

13. What are the options for cancelling?

You can cancel free of charge up to 14 days before the course starts. If you have to cancel at short notice due to illness or other reasons, you have the option of adding a substitute participant or of making up the course at a later date (within 6 months).

14. When will I receive a firm commitment as to whether the course will take place?

You will receive binding confirmation 7 days before the course begins as to whether it will go ahead.

15. How many participants are required for a course to be given/what is the minimum number of participants?

We generally offer courses for 5 or more people. That means that if you would like to book a course at your premises, you need 5 people to register or need to pay the amount for 5 participants, even if fewer people attend.

16. Can I book a course that is given in English?

If you need a course that is officially advertised as given in German to be given in English, please contact us. We will try to make that possible for you.

17. What language is the course in?

Our webinars and online courses are conducted in English. All our F2F training courses are generally conducted in German. Feel free to contact us if you need face-to-face training in English or online training in German.

18. What formats are available in the DSP category?

All PLC2 trainings are available in multiple formats (e.g. F2F, online or in-house) to fit different learning preferences and project constraints.

19. Is prior experience with FPGA or SoC platforms required to attend PLC2 training in the DSP & Image Processing category ?

Not strictly for foundational modules, but familiarity with embedded / FPGA architectures significantly enhances learning outcomes. Advanced trainings assume experience with toolchains.

20. Which tools and frameworks are used in the DSP & Image Processing training courses?

Depending on the course, tools may include:

  • MATLAB/Simulink or equivalent algorithm modelling environments.
  • FPGA/SoC toolchains (Vivado, Vitis, Vitis HLS).
  • Embedded development toolchains.
  • Libraries for optimized DSP and image processing.

The focus is on workflows that bridge algorithm design and efficient hardware / embedded implementation.

21. Will I learn how to implement digital signal processing (DSP) algorithms on hardware in the PLC2 courses in the DSP & Image Processing category?

Yes. Trainings include practical examples and labs showing how to map DSP and image processing algorithms to hardware using high-level languages, HDL, and optimized libraries, addressing performance, resource utilization, and real-time constraints.

22. What prior knowledge is recommended for a DSP & Image Processing course?

A solid understanding of digital logic, linear systems, signals & systems, and basic programming (e.g., C/C++ or HDL) is recommended. Some courses target intermediate to advanced practitioners, while introductory modules cover essential theory and workflows.

23. Who is PLC2's DSP & Image Processing training designed for?

These courses are ideal for signal and image processing engineers, embedded system developers, FPGA / SoC designers working with real-time data streams, machine vision engineers, and anyone who wants to apply DSP techniques efficiently on hardware or high-performance embedded platforms.

24. What topics are covered in PLC2's DSP & Image Processing training category?

The DSP & Image Processing category focuses on digital signal processing fundamentals and practical techniques for real-time systems, including filter design, FFTs, convolution / correlation, spectral analysis, adaptive algorithms, and image processing pipelines such as feature extraction, segmentation, and performance optimization, with emphasis on implementation on FPGA, SoC, and embedded platforms.