AMD (Adaptive) SoC, MPSoC & FPGA Architecture

Developing Demanding Applications with Versal Adaptive SoCs

Online Live

These sessions introduce the Versal Adaptive SoC technology and the flexible computation engines provided by the respective device flavours. To foster insight into the tool flow, we will walk through general toolchain concepts with the Vitis Unififed Development Platform and explain the effective design approaches when targeting Versal devices. This is supported by a wide range of IP entries and available libraries that will be described in the context of system-level design integration.

Attendees of the online live training will perform the practical exercises in real time with instructor assistance.

Course language: English

Book workshop

Contact

Michael Schwarz

+49 7664 91313-15

michael.schwarz@plc2.de

Details

Applicable technologies

Versal Adaptive SoCs and Vitis Unified Development Platform

Requirements

Basic Knowledge of Embedded Systems and/or FPGA Technology

Duration

1 day

Fee (net per person)

€ 680

Agenda

Introduction to Versal ACAP design flow

Versal ACAP architecture introduction
• Scalar engines
• Intelligent engines (AIE, DSP Engines)
• Adaptable engines
NoC concepts
CPM and transceiver overview

Versal adaptive SoC design flow

Platform generation and concepts
Vitis Unified Development platform
• Embedded design flow
• Extensible platform flow

Versal application acceleration with the Vitis tools

Kernel basics
• HLS vs. AI engines
• Model composer
• AI engines
Vitis ecosystem for full application acceleration
• Vitis libraries
• System integration

Dates

Developing Demanding Applications with Versal Adaptive SoCs

Online

the whole year tbd

Book now

Available formats for this training

Developing Demanding Applications with Versal Adaptive SoCs

1 day

€ 680

Online Live

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