Developing Demanding Applications with Versal Adaptive SoCs
Online Live
These sessions introduce the Versal Adaptive SoC technology and the flexible computation engines provided by the respective device flavours. To foster insight into the tool flow, we will walk through general toolchain concepts with the Vitis Unififed Development Platform and explain the effective design approaches when targeting Versal devices. This is supported by a wide range of IP entries and available libraries that will be described in the context of system-level design integration.
Course language: English
Contact
Michael Schwarz
+49 7664 91313-15
Details
Applicable technologies
Versal Adaptive SoCs and Vitis Unified Development PlatformRequirements
Basic Knowledge of Embedded Systems and/or FPGA TechnologyDuration
1 dayFee (net per person)
€ 680Agenda
01
Introduction to Versal ACAP design flow
Versal ACAP architecture introduction
• Scalar engines
• Intelligent engines (AIE, DSP Engines)
• Adaptable engines
NoC concepts
CPM and transceiver overview
02
Versal adaptive SoC design flow
Platform generation and concepts
Vitis Unified Development platform
• Embedded design flow
• Extensible platform flow
03
Versal application acceleration with the Vitis tools
Kernel basics
• HLS vs. AI engines
• Model composer
• AI engines
Vitis ecosystem for full application acceleration
• Vitis libraries
• System integration
Dates
Developing Demanding Applications with Versal Adaptive SoCs
OL
Online
the whole year tbd
Available formats for this training
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Compact Versal ACAP: Power and Board Design |
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